The graphene nano-electro-mechanical switches are promising components due to their outstanding switching performance. However, most of the reported devices suffered from a large actuation voltages, hindering them from the integration in the conventional complementary metal-oxide-semiconductor (CMOS) circuit. In this work, we demonstrated the graphene nano-electro-mechanical switches with the local actuation electrode via conventional nanofabrication techniques. Both cantilever-type and double-clamped beam switches were fabricated. These devices exhibited the sharp switching, reversible operation cycles, high on/off ratio, and a low actuation voltage of below 5 V, which were compatible with the CMOS circuit requirements.

In this paper, we report the finite element method (FEM) simulation of double-clamped graphene nanoelectromechanical (NEM) switches. Pull-in and pull-out characteristics are analyzed for graphene NEM switches with different dimensions and these are consistent with the experimental results. This numerical model is used to study the scaling nature of the graphene NEM switches. We show the possibility of achieving a pull-in voltage as low as 2 V for a 1.5-μm-long and 3-nm-thick nanocrystalline graphene beam NEM switch. In order to study the mechanical reliability of the graphene NEM switches, von Mises stress analysis is carried out. This analysis shows that a thinner graphene beam results in a lower von Mises stress. Moreover, a strong electrostatic force at the beam edges leads to a mechanical deflection at the edges larger than that around the center of the beam, which is consistent with the von Mises stress analysis.

Static and dynamic mechanical properties of the movable floating gate are investigated for a newly proposed highspeed and nonvolatile nanoelectromechanical memory, which features a buckled floating gate incorporating the nanocrystalline silicon quantum dots integrated onto the gate of a MOSFET. By conducting a 3D finite element simulation, we analyze the structural parameter dependence of the switching force F_s needed for the buckled floating gate to flip-flop between its bistable states and derive the relationship F_s infin L ^-4 T Z₀ ³ where L, T, and Z₀ represent the length, thickness, and equilibrium displacement of the buckled floating gate, respectively. We demonstrate that the switching frequency can be increased while maintaining the switching force when we downscale all the floating gate dimensions proportionally along with the scaling law. We also show that the switching voltage can be reduced down to less than 15 V while maintaining the ON/OFF operation range of the sense MOSFET by optimizing the cavity structure which sustains the inside buckled floating gate

The miniaturization trend leads to the development of a graphene based nanoelectromechanical (NEM) switch to fulfill the high demand in low power device applications. In this article, we highlight the finite element (FEM) simulation of the graphene-based NEM switches of fixed-fixed ends design with beam structures which are perforated and intact. Pull-in and pull-out characteristics are analyzed by using the FEM approach provided by IntelliSuite software, version 8.8.5.1. The FEM results are consistent with the published experimental data. This analysis shows the possibility of achieving a low pull-in voltage that is below 2 V for a ratio below 15:0.03:0.7 value for the graphene beam length, thickness, and air gap thickness, respectively. The introduction of perforation in the graphene beam-based NEM switch further achieved the pull-in voltage as low as 1.5 V for a 250 nm hole length, 100 nm distance between each hole, and 12-number of hole column. Then, a von Mises stress analysis is conducted to investigate the mechanical stability of the intact and perforated graphene-based NEM switch. This analysis shows that a longer and thinner graphene beam reduced the von Mises stress. The introduction of perforation concept further reduced the von Mises stress at the graphene beam end and the beam center by approximately ~20–35% and ~10–20%, respectively. These theoretical results, performed by FEM simulation, are expected to expedite improvements in the working parameter and dimension for low voltage and better mechanical stability operation of graphene-based NEM switch device fabrication.

Controlling the heat transport and thermal conductivity through a material is of prime importance for thermoelectric applications. Phononic crystals, which are a nanostructured array of specially designed pores, can suppress heat transportation owing to the phonon wave interference, resulting in bandgap formation in their band structure. To control heat phonon propagation in thermoelectric devices, phononic crystals with a bandgap in the THz regime are desirable. In this study, we carried out simulation on snowflake shaped phononic crystal and obtained several phononic bandgaps in the THz regime, with the highest being at ≈2 THz. The phononic bandgap position and the width of the bandgap were found to be tunable by varying the neck-length of the snowflake structure. A unique bandgap map computed by varying the neck-length continuously provides enormous amounts of information as to the size and position of the phononic bandgap for various pore dimensions. We have also carried out transmission spectrum analysis and found good agreement with the band structure calculations. The pressure map visualized at various frequencies validates the effectiveness of snowflake shaped nano-pores in suppressing the phonons partially or completely, depending on the transmission probabilities.

Following the rapid development of the electronics industry and technology, it is expected that future electronic devices will operate based on functional units at the level of electrically active molecules or even atoms. One pathway to observe and characterize such fundamental operation is to focus on identifying isolated or coupled dopants in nanoscale silicon transistors, the building blocks of present electronics. Here, we review some of the recent progress in the research along this direction, with a focus on devices fabricated with simple and CMOS-compatible-processing technology. We present results from a scanning probe method (Kelvin probe force microscopy) which show direct observation of dopant-induced potential modulations. We also discuss tunneling transport behavior based on the analysis of low-temperature I-V characteristics for devices representative for different regimes of doping concentration, i.e., different inter-dopant coupling strengths. This overview outlines the present status of the field, opening also directions toward practical implementation of dopant-atom devices.