The firing of space cell in hippocampus is considered to be able to form an intrinsic map for the environment which is called cognitive map. Previous bionic navigation algorithms (such as rat simultaneous localization and mapping) and traditional SLAM algorithms lack sufficient physiological basis and cannot reflect the cognitive mechanism of hippocampal formation. Based on the cognitive mechanism of hippocampal space cells, this paper proposes a navigation algorithm for constructing accurate environmental cognitive map. This algorithm is characterized by the construction of a unified spatial cell attractor model for self-motion trajectory path integration. The expressions of grid cells and place cells are driven by stripe cells. The algorithm performs closed-loop detection by collecting depth image, red green blue+depthmap information and corrects the error of spatial cells' path integral. Eventually, we get a precise cognitive map of the environment and bionic robot navigation is achieved by global navigation and local navigation algorithm based on the map. The cognitive map is a topological metric map that contains the topological relations of the environment feature point coordinates, visual cues, and specific sites. In this paper, the method is verified by the simulation experiment and the physical experiment on the robot platform. The research results laid the foundation for the research of the robot navigation method based on the hippocampus cognitive mechanism.
19 July 2022 in CAAI Transactions on Intelligence Technology
Accurately identifying defect patterns in wafer maps can help engineers find abnormal failure factors in production lines. During the wafer testing stage, deep learning methods are widely used in wafer defect detection due to their powerful feature extraction capabilities. However, most of the current wafer defect patterns classification models have high complexity and slow detection speed, which are difficult to apply in the actual wafer production process. In addition, there is a data imbalance in the wafer dataset that seriously affects the training results of the model. To reduce the complexity of the deep model without affecting the wafer feature expression, this paper adjusts the structure of the dense block in the PeleeNet network and proposes a lightweight network WM‐PeleeNet based on the PeleeNet module. In addition, to reduce the impact of data imbalance on model training, this paper proposes a wafer data augmentation method based on a convolutional autoencoder by adding random Gaussian noise to the hidden layer. The method proposed in this paper has an average accuracy of 95.4% on the WM‐811K wafer dataset with only 173.643 KB of the parameters and 316.194 M of FLOPs, and takes only 22.99 s to detect 1000 wafer pictures. Compared with the original PeleeNet network without optimization, the number of parameters and FLOPs are reduced by 92.68% and 58.85%, respectively. Data augmentation on the minority class wafer map improves the average classification accuracy by 1.8% on the WM‐811K dataset. At the same time, the recognition accuracy of minority classes such as Scratch pattern and Donut pattern are significantly improved.
Wafer map inspection is essential for semiconductor manufacturing quality control and analysis. The deep convolutional neural network (DCNN) is the most effective algorithm in wafer defect pattern analysis. Traditional DCNNs rely heavily on high quality datasets for training. However, obtaining balanced and sufficient labeled data is difficult in practice. This paper reconsiders the causes of the imbalance and proposes a deep learning method that can learn robust knowledge from an imbalanced dataset using the attention mechanism and cosine normalization. We interpret the dataset imbalance as both a feature and a quantity distribution imbalance. To compensate for feature distribution imbalance, we add an improved convolutional attention module to the DCNN to enhance representation. In particular, a feature-map-specific direction mapping module is developed to amplify the positional information of defect clusters. For quantity distribution imbalance, the cosine normalization algorithm is proposed to replace the fully connected layer, and classifier fine-tuning is realized through a small amount of iterative training, which decreases the sensitivity to the quantitative distribution. The experimental results on real-world datasets demonstrate that the proposed method significantly improves the robustness of wafer map inspection and outperforms existing algorithms when trained on imbalanced datasets.
1 January 2023 in Mathematical Biosciences and Engineering
The semiconductor manufacturing industry relies heavily on wafer surface defect detection for yield enhancement. Machine learning and digital image processing technologies have been used in the development of various detection algorithms. However, most wafer surface inspection algorithms are not be applied in industrial environments due to the difficulty in obtaining training samples, high computational requirements, and poor generalization. In order to overcome these difficulties, this paper introduces a full-flow inspection method based on machine vision to detect wafer surface defects. Starting with the die image segmentation stage, where a die segmentation algorithm based on candidate frame fitting and coordinate interpolation is proposed for die sample missing matching segmentation. The method can segment all the dies in the wafer, avoiding the problem of missing dies splitting. After that, in the defect detection stage, we propose a die defect anomaly detection method based on defect feature clustering by region, which can reduce the impact of noise in other regions when extracting defect features in a single region. The experiments show that the proposed inspection method can precisely position and segment die images, and find defective dies with an accuracy of more than 97%. The defect detection method proposed in this paper can be applied to inspect wafer manufacturing.
27 March 2023 in IEEE Transactions on Consumer Electronics
Recognition of wafer map defect patterns is essential for evaluating the reliability of micro-electronic manufacturing. Due to the difficulty of labeling, the available large-scale wafer maps are raw data without labeling. The scarcity of labeled samples reduces the defect pattern recognition accuracy of popular deep convolutional neural networks. To overcome this problem, we propose a wafer map deep clustering (WMDC) model. It learns generic representations from unlabeled datasets in an unsupervised manner. A prototype metric loss during training helps to learn the semantic features of the categories. We improve the recognition accuracy of the model when trained using scarce labeled data by transferring the weights of unsupervised pretraining. Experiments on WM811K and MixedWM38 wafer datasets demonstrate that the WMDC model is capable of obtaining robust prior representations from the unlabeled wafer maps. Accuracies of 97.43% and 98.74% are obtained when fine-tuning using scarce labeled data from both datasets, respectively.