Heejun Yang

Heejun Yang


Research Focus & Metrics

Academic Career Length

15Years (2012-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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7 August 2015 in Science
Verified
Journal Article
Closed access
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SCSuyeon Cho
Suyeon Cho
SKSera Kim
Sera Kim
JKJung Ho Kim
Jung Ho Kim
JZJiong Zhao
Jiong Zhao
JSJinbong Seok
Jinbong Seok
HYHeejun Yang
Heejun Yang
Making better contacts: A key issue in fabricating transistors is making a good electrical contact to the semiconductor gate material. For two-dimensional materials, one route is through a phase transition that converts a hexagonally packed semiconductor phase into a distorted octahedrally packed metallic phase. Cho et al. show that laser heating of molybdenum telluride (MoTe 2 ) achieves this conversion through the creation of Te vacancies. The phase transition improves charge carrier mobility while maintaining the low resistance necessary for improved transistor function. Science , this issue p. 625

14 May 2021 in Science Advances
Verified
Journal Article
Open access
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Linfeng SUNLinfeng SUN
Linfeng SUN
Zhongrui WangZhongrui Wang
Zhongrui Wang
JJJinbao Jiang
Jinbao Jiang
YKYeji Kim
Yeji Kim
BJBomin Joo
Bomin Joo
HYHeejun Yang
Heejun Yang
High dimensionality and fading memory for in-sensor reservoir computing are achieved via two-dimensional memristors.

18 July 2019 in Nature Communications
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Journal Article
Open access
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Linfeng SUNLinfeng SUN
Linfeng SUN
YZYishu Zhang
Yishu Zhang
GHGyeongtak Han
Gyeongtak Han
GHGeunwoo Hwang
Geunwoo Hwang
JJJinbao Jiang
Jinbao Jiang
HYHeejun Yang
Heejun Yang
The large-scale crossbar array is a promising architecture for hardware-amenable energy efficient three-dimensional memory and neuromorphic computing systems. While accessing a memory cell with negligible sneak currents remains a fundamental issue in the crossbar array architecture, up-to-date memory cells for large-scale crossbar arrays suffer from process and device integration (one selector one resistor) or destructive read operation (complementary resistive switching). Here, we introduce a self-selective memory cell based on hexagonal boron nitride and graphene in a vertical heterostructure. Combining non-volatile and volatile memory operations in the two hexagonal boron nitride layers, we demonstrate a self-selectivity of 1010 with an on/off resistance ratio larger than 103. The graphene layer efficiently blocks the diffusion of volatile silver filaments to integrate the volatile and non-volatile kinetics in a novel way. Our self-selective memory minimizes sneak currents on large-scale memory operation, thereby achieving a practical readout margin for terabit-scale and energy-efficient memory integration.

18 April 2018 in Nano Letters
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Journal Article
Closed access
Linfeng SUNLinfeng SUN
Linfeng SUN
YZYishu Zhang
Yishu Zhang
GHGeunwoo Hwang
Geunwoo Hwang
JJJinbao Jiang
Jinbao Jiang
DKDohyun Kim
Dohyun Kim
HYHeejun Yang
Heejun Yang

24 March 2017 in 2D Materials
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Journal Article
Open access
PDF file
JSJinbong Seok
Jinbong Seok
JLJun-Ho Lee
Jun-Ho Lee
SCSuyeon Cho
Suyeon Cho
BJByungdo Ji
Byungdo Ji
HKHyo Won Kim
Hyo Won Kim
HYHeejun Yang
Heejun Yang

17 August 2023 in Chemical Reviews
Verified
Journal Article
Closed access
DKDohyun Kim
Dohyun Kim
JPJuhi Pandey
Juhi Pandey
JJJuyeong Jeong
Juyeong Jeong
WCWoohyun Cho
Woohyun Cho
SLSeungyeon Lee
Seungyeon Lee
HYHeejun Yang
Heejun Yang