Jong-Kook Kim

Prof. Jong-Kook Kim

School of Electrical Engineering, Korea University, Seoul, Korea

Research Focus & Metrics

Academic Career Length

27Years (2000-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

View All Publications
1 June 2004 in IEEE Transactions on Parallel and Distributed Systems
Verified
Journal Article
Closed access
SAS. Ali
S. Ali
AMA.A. Maciejewski
A.A. Maciejewski
HSH.J. Siegel
H.J. Siegel
Jong-Kook KimJong-Kook Kim
Jong-Kook Kim
Parallel and distributed systems may operate in an environment that undergoes unpredictable changes causing certain system performance features to degrade. Such systems need robustness to guarantee limited degradation despite fluctuations in the behavior of its component parts or environment. This research investigates the robustness of an allocation of resources to tasks in parallel and distributed systems. The main contributions are 1) a mathematical description of a metric for the robustness of a resource allocation with respect to desired system performance features against multiple perturbations in multiple system and environmental conditions, and 2) a procedure for deriving a robustness metric for an arbitrary system. For illustration, this procedure is employed to derive robustness metrics for three example distributed systems. Such a metric can help researchers evaluate a given resource allocation for robustness against uncertainties in specified perturbation parameters.

9 March 2016 in Journal of Materials Chemistry A
Verified
Journal Article
Closed access
PDF file
YYYongju Yoo
Yongju Yoo
MKMin-Seop Kim
Min-Seop Kim
Jong-Kook KimJong-Kook Kim
Jong-Kook Kim
YKYong Sin Kim
Yong Sin Kim
WKWoong Kim
Woong Kim
Replacing the bulky aluminum electrolytic capacitors (AECs) used extensively in AC line filtering with a compact supercapacitor would contribute greatly to the miniaturization of electronic devices. However, the supercapacitors developed for AC line filtering have limited application voltages of ≤∼20 V. To extend the range of application voltages, it is essential to design carbon electrode materials with a suitable pore structure. This paper reports that graphitic ordered mesoporous carbon (GOMC) can be used as an electrode material in supercapacitors for AC line filtering applications. By utilizing the open pore structure of GOMC, which is also known as CMK-3, a 2.5 V supercapacitor with a high areal capacitance (Careal ∼ 560 μF cm−2 at 120 Hz) and a fast frequency response (ϕ ∼ −80° at 120 Hz) was realized. Importantly, the addition of a small amount of CNTs to the CMK-3 results in the formation of an efficient electrical network between the individual CMK-3 particles. The successful conversion of a 60 Hz AC signal to a DC output was demonstrated using the supercapacitors. The advantages of the CMK-3/CNT supercapacitor over a commercial AEC can be extended to applications up to ∼40 V.

1 February 2007 in Journal of Parallel and Distributed Computing
Verified
Journal Article
Closed access
Jong-Kook KimJong-Kook Kim
Jong-Kook Kim
SSSameer Shivle
Sameer Shivle
HSHoward Jay Siegel
Howard Jay Siegel
AMAnthony A. Maciejewski
Anthony A. Maciejewski
TBTracy D. Braun
Tracy D. Braun
SYSiva Sankar Yellampalli
Siva Sankar Yellampalli

27 June 2008 in IEEE Transactions on Parallel and Distributed Systems
Verified
Journal Article
Closed access
Jong-Kook KimJong-Kook Kim
Jong-Kook Kim
HSHoward Jay Siegel
Howard Jay Siegel
AMAnthony A. Maciejewski
Anthony A. Maciejewski
RERudolf Eigenmann
Rudolf Eigenmann
An ad hoc grid is a wireless heterogeneous computing environment without a fixed infrastructure. This study considers wireless devices that have different capabilities, have limited battery capacity, support dynamic voltage scaling, and are expected to be used for eight hours at a time and then recharged. To maximize the performance of the system, it is essential to assign resources to tasks (match) and order the execution of tasks on each resource (schedule) in a manner that exploits the heterogeneity of the resources and tasks while considering the energy constraints of the devices. In the single-hop ad hoc grid heterogeneous environment considered in this study, tasks arrive unpredictably, are independent (i.e., no precedent constraints for tasks), and have priorities and deadlines. The problem is to map (match and schedule) tasks onto devices such that the number of highest priority tasks completed by their deadlines during eight hours is maximized while efficiently utilizing the overall system energy. A model for dynamically mapping tasks onto wireless devices is introduced. Seven dynamic mapping heuristics for this environment are designed and compared to each other and to a mathematical bound.

6 September 2023 in IEEE Access
Verified
Journal Article
Open access
XPXinyu Piao
Xinyu Piao
DSDoangjoo Synn
Doangjoo Synn
JPJooyoung Park
Jooyoung Park
Jong-Kook KimJong-Kook Kim
Jong-Kook Kim
Recent deep learning models are difficult to train using a large batch size, because commodity machines may not have enough memory to accommodate both the model and a large data batch size. The batch size is one of the hyper-parameters used in the training model, and it is dependent on and is limited by the target machine memory capacity because the batch size can only fit into the remaining memory after the model is uploaded. Moreover, the data item size is also an important factor because if each data item size is larger then the batch size that can fit into the remaining memory becomes smaller. This paper proposes a method called Micro-Batch Processing (MBP) to address this problem. This method helps deep learning models to train by providing a batch processing method that splits a batch into a size that can fit in the remaining memory and processes them sequentially. After processing the small batches individually, a loss normalization algorithm based on the gradient accumulation is used to maintain the performance. The purpose of our method is to allow deep learning models to train using larger batch sizes that exceed the memory capacity of a system without increasing the memory size or using multiple devices (GPUs).

27 October 2014 in IEEE Electron Device Letters
Verified
Journal Article
Closed access
JKJeong-Kyu Kim
Jeong-Kyu Kim
GKGwang-Sik Kim
Gwang-Sik Kim
HNHyohyun Nam
Hyohyun Nam
CSChanghwan Shin
Changhwan Shin
JPJin-Hong Park
Jin-Hong Park
HYHyun-Yong Yu
Hyun-Yong Yu
We investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n + -IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal- semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, the M-I-S S/D structure with n + -IL provides much lower contact resistivity, resulting in ~5× lower contact resistivity than 1×10 -8 Ω-cm 2 , specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n + -IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration.