In this paper, a novel technique to design concurrent dual-band high-efficiency harmonic tuned (HT) power amplifiers (PAs) is presented. The proposed approach is based on a methodology developed to design multifrequency passive matching networks, which allows concurrent operability. The network design criterion is heavily investigated and later generalized both from the theoretical and practical point of view. The design, realization, and the complete characterization of a concurrent dual-band high-efficiency HT PA is finally described. A 1-mm gate periphery GaN HEMT device was used for the design and realization of the PA operating concurrently at 2.45 and 3.3 GHz. The measurement results have shown 53% and 46% drain efficiency at 33- and 32.5-dBm output power in the two targeted bands if operated in continuous wave single mode. In concurrent mode, 35% average efficiency was achieved with two simultaneously applied orthogonal frequency-division multiplexing signals.

This paper presents an innovative architecture to drastically enlarge the bandwidth of the Doherty power amplifier (DPA). The proposed topology, based on novel input/output splitting/combining networks, allows to overcome the typical bandwidth limiting factors of the conventional DPA. A complete and rigorous theoretical investigation of the developed architecture is presented leading to a closed-form formulation suitable for a direct synthesis of ultra-wideband DPAs. The theoretical formulation is validated through the design, realization, and test of a hybrid prototype based on commercial GaN HEMT device showing a fractional bandwidth larger than 83%. From 1.05 to 2.55 GHz, experimental results with continuous-wave signals have shown efficiency levels within 83%-45% and within 58%-35% at about 42- and 36-dBm output power, respectively. The DPA has also been tested and digitally predistorted by using a 5-MHz Third Generation Partnership Project (3GPP) signal. In particular, to evaluate the ultra-wideband and the multi-mode capabilities of the prototype, f ₁ = 1.2 GHz, f ₂ = 1.8 GHz, and f ₃ = 2.5 GHz have been selected as carrier frequencies for the 3GPP signal. Under these conditions and at 36-dBm average output power, the DPA shows 52%, 35%, and 52% efficiency and an adjacent channel power ratio always lower than -43 dBc.

In this article, the complete theoretical analysis of a Doherty amplifier employing a Class AB bias condition for the Main and a Class C one for the Auxiliary devices, respectively, is presented. Starting from the simplified model of an active device, the analysis of the AB‐C Doherty behavior is carried out as a function of the input signal. In particular, the proposed approach is based on the analysis of the output drain current waveforms generated by the two active devices, while assuming a Tuned Load configuration (i.e., short circuit condition) for higher harmonic terminations. A closed form formulation is derived in order to directly design an AB‐C Doherty amplifier, while fully understanding the basis of its physical behavior. Finally, which Doherty parameters can be chosen by the designer or have to be implicitly fixed are discussed and clarified. © 2008 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2009.

In this paper, the design, fabrication, and test of high-efficiency, high-power C-band harmonic-tuned power amplifiers in GaN technology is reported. The amplifier has been designed utilizing second-harmonic tuning for high-efficiency operation, thus exploiting the high-breakdown voltage peculiarity of GaN-based devices. Realized in a hybrid form, the amplifier has been characterized in terms of small-signal, power, and intermodulation (IMD) performance. An operating bandwidth over 20% around 5.5 GHz, with 33-dBm minimum output power, and 60% drain efficiency at center frequency is demonstrated, together with low IMD

The aim of this paper is to present a closed-form formulation suitable for a direct computer-aided design synthesis of a Doherty amplifier employing a Class F design strategy for the Main (or Carrier) device. For this purpose, starting from a simplified model for the adopted active devices, the behavioral analysis of the Class F Doherty amplifier is carried out as a function of the input signal. A particular emphasis is dedicated to put into evidence the differences existing when a simple tuned load harmonic termination is considered. The theoretical aspects are deeply discussed and an experimental validation is also provided.

This letter presents the design and characterization of a novel wideband Doherty architecture. Both input splitter and output combiner are realized by means of two-sections branch-line alike couplers. The realized prototype based on commercial GaN active devices shows more than 36% of fractional bandwidth, from 1.67 to 2.41 GHz. In this frequency range, the measured drain efficiency is within 59% and 43% at 6 dB of output power back-off and within 72% and 53% at saturation, with an output power around 41 dBm. More than 47% average efficiency and less than -40 dBc adjacent channel power ratio are measured applying a 20 MHz LTE digitally pre-distorted signal when the average output power is around 4 W.