Physical unclonable function (PUF), a hardware-efficient approach, has drawn a lot of attention in the security research community for exploiting the inevitable manufacturing variability of integrated circuits (IC) as the unique fingerprint of each IC. However, analog PUF is not robust and resistant to environmental conditions. In this paper, we propose a digital PUF-based secure authentication model using the emergent spin-transfer torque magnetic random-access memory (STT-MRAM) PUF (called STT-DPSA for short). STT-DPSA is an original secure identity authentication architecture for Internet of Things (IoT) devices to devise a computationally lightweight authentication architecture which is not susceptible to environmental conditions. Considering hardware security level or cell area, we alternatively build matrix multiplication or stochastic logic operation for our authentication model. To prove the feasibility of our model, the reliability of our PUF is validated via the working windows between temperature interval (−35 ${}^{\circ }$ C, 110 ${}^{\circ }$ C) and Vdd interval [0.95 V, 1.16 V] and STT-DPSA is implemented with parameters n = 32, i = o = 1024, k = 8, and l = 2 using FPGA design flow. Under this setting of parameters, an attacker needs to take time complexity O( $2^{256}$ ) to compromise STT-DPSA. We also evaluate STT-DPSA using Synopsys design compiler with TSMC 0.18 um process.

Over the last decade, quantum computing has experienced significant changes and captured worldwide attention. In particular, superconducting qubits have become the leading candidates for scalable quantum computers, and a number of cryogenic materials have scientifically demonstrated their potential uses in constructing qubit chips. However, because of insufficient coherence time, establishing a robust and scalable quantum platform is still a long-term goal. Another consideration is the control circuits essential to initializing, operating and measuring the qubits. To keep noise low, control circuits in close proximity to the qubits require superior reliability in the cryogenic environment. The realization of the quantum advantage demands qubits with appropriate circuitry designs to maintain long coherence times and entanglement. In this work, we briefly summarize the current status of cryogenic materials for qubits and discuss typical cryogenic circuitry designs and integration techniques for qubit chips. In the end, we provide an assessment of the prospects of quantum computers and some other promising cryogenic materials.