The dual-active-bridge (DAB) is a typical topology of dc–dc converter for bus connection, voltage conversion, power transmission, and electrical isolation in dc power grids. The open-circuit switching fault (OCSF) may threaten the safe operation of DAB and should be eliminated in time. However, the researches on parasitic parameters mainly focus on traditional dc–dc converters, and there are still few discussions on parasitic parameters in the high-frequency dc–dc converter such as DAB. The power components are usually considered without parasitic parameters in OCSF analysis and tolerant control, leading to deviations in modality analysis and practical control for DAB. To solve this issue, the modality analysis considering parasitic parameters during OCSF in DAB is investigated, and the sneak circuits and electrical characteristics with parasitic parameters are discussed in this article. Besides, to realize fault tolerance for DAB during OCSF considering parasitic parameters, a new fault tolerance control strategy including modeling, topology transformation principle, and practical control architecture are also proposed. Compared with conventional fault tolerance strategy, the proposed strategy will be more efficient, rapid and feasible for DAB during OCSF process. The experimental results in DAB prototype verify correctness and effectiveness of analysis and proposed strategy.

For a three-phase isolated AC-DC matrix converter, the slight volt-second imbalance caused by variable input voltage is an inherent defect and has been neglected in most PWM schemes. The analysis in this paper shows that the imbalance lies in a single direction during the entire input cycle, and it might generate a large DC bias to severely decrease the efficiency of the steady-state operation. Therefore, the imbalance phenomenon is first investigated, and the generation mechanism of the steady-state DC bias is derived in detail. To eliminate such a DC bias, a novel transformer primary-side voltage pulse is originally defined. Based on the special crisscrossing operation mode with the above pulse, a simple but effective four-segment space vector PWM (4S-SVPWM) scheme is proposed. Compared with the conventional more-segment SVPWM schemes, the novel 4S-SVPWM scheme can achieve volt-second self-balancing without auxiliary methods, as well as a 1/2 reduction in the common-mode voltage (CMV) peak value and a 1/3 reduction in the switching actions. The overall efficiency and power density of the converter are greatly improved. Finally, an experimental prototype is built to validate the correctness and effectiveness of the novel scheme.

Since all of the three-phase isolated ac–dc matrix converters (3P-IMC) must be strictly limited to the symmetrical operation modes to maintain volt-second balance, there could be a lot of symmetrical but redundant switching actions to increase the switching loss. Hence, a generalized volt-second balance model is summarized for 3P-IMC in this article, and a quasi-symmetrical space vector pulsewidth modulation (QSVPWM) scheme is then proposed. The QSVPWM scheme has fewer current vectors to synthesize the reference current vector and, therefore, features a quasi-symmetrical switching pattern to achieve 1/6 reduction in the switching actions. Moreover, the current root-mean-square value could also be decreased with the proposed QSVPWM scheme owing to the special operation modes. Compared with the conventional symmetrical SVPWM scheme, the system loss is reduced and the efficiency is improved. The other characteristics of the proposed scheme, including operation range, duty-cycle loss, narrow pulse, flux density, and volt/ampere-second balance model, are also analyzed and compared in detail. Finally, a 600-W 3P-IMC prototype is built up to verify the performance of the proposed scheme.

The three-phase isolated ac-dc matrix converter (3P-IMC) inherits all the merits of the conventional matrix converter. But it also suffers from a large number of bidirectional switches and can not operate safely in open-circuit fault condition. Hence, with a general space vector PWM (SVPWM) model presented in this paper, three types of asymmetrical SVPWM (ASVPWM) schemes are first proposed for normal and open-circuit fault-tolerant operation. The ASVPWM schemes have more kinds of synthetic vectors with asymmetrical distribution, however, also features a higher freedom and flexibility to further improve the system performance. Then by sectional combining the above ASVPWM schemes with the conventional one, the 3P-IMC could be continued to operate with a tight dc output voltage regulation under single-switch open-circuit fault condition, which has an inherent open-circuit fault-tolerant capability. Compared with the conventional two-phase fault-tolerant operation, the proposed method has a smaller output voltage ripple, lower current stress, lower current harmonic and higher maximum output power, etc. The safety and reliability of the converter are greatly improved. Finally, a 3P-IMC experimental prototype is built up to verify the performance of the proposed ASVPWM schemes.

This paper proposes a single-stage bridgeless isolated AC-DC power factor correction(PFC) topology, and this topology can realize the function of step-up and the galvanic isolation for the AC input and DC output voltages through single-stage power conversion process. Firstly, the operation principle of the topology is analyzed in details. Then, by reasonably designing the series resonant parameters, the zero-voltage-switching (ZVS) turn-on for the power switches in the primary-side and zero-current-switching (ZCS) turn-off for the output rectifier diodes in the secondary-side of the transformer can also be achieved under wide load range, and the voltage stress of the power switches are also reduced based on the active clamping technology. The design procedure for the key components of the proposed converter is also derived. Finally, a 3kW experimental prototype based on SiC power devices with 85kHz switching frequency is built to verify the correctness and feasibility of the proposed topology, and the experimental results show a good performance. It can operates in a wide input grid voltage range, 95.7% of peak conversion efficiency and 3.9% of total harmonic distortion(THD) value for grid current could be obtained.

This letter proposes a simplified switch short-circuit fault-tolerant scheme for three-phase six-switch current-source rectifier (3P6S-CSR). By only adding two diodes in parallel for each phase, the active switches are not affected and the ones in the same phase are mutual redundancy. Then, the 3P6S-CSR can be reconstructed into a novel fault-tolerant structure under multiple switch short-circuit faults. Moreover, all driving signals of the remaining switches are the same with the normal operation, which means the modulation methods are also redundant to each other and do not need to be changed. Compared with the conventional schemes, it is simply and has the lower hardware and software costs with higher reliability. Finally, the experimental results have been presented to verify the effectiveness.