Titanium dioxide (TiO₂) thin films are deposited on silicon substrates by using sol-gel dip coating technique. Annealing temperature was varied to investigate its effect on the surface morphology, structural and electrical properties of the film. The crystalline structure, surface morphology and the electrical properties were investigated by X-ray diffraction, field emission scanning electron microscopy (FESEM), atomic force microscope (AFM), and four point probe. The results show that with an increase in annealing temperature, the value of the intensity of (101) peak increases while the value of the full-width at half maximum decreases. Thin films deposited at high annealing temperatures result in an increase in surface roughness and grain size. The electrical properties of these films show that the resistivity varies between 1.40 × 10⁵ and 7.19 × 10² Ω.cm when the annealing temperature changes from 300 to 900°C, respectively. The TiO₂ thin films annealed at 900°C exhibited lower resistivity than other films. It found that the annealing temperature influences the surface morphology, structural and electrical properties of TiO₂ thin films.

Pentacene-based organic thin-film transistors (OTFTs) with solution-processed barium titanate (Ba_1.2Ti_0.8O₃) as a gate insulator are demonstrated. The electrical properties of pentacene-based TFTs show a high field-effect mobility of 8.85 cm² · V^-1 · s^-1, a low threshold voltage of -1.89 V, and a low subthreshold slope swing of 310 mV/decade. The chemical composition and binding energy of solution-processed barium titanate thin films are analyzed through X-ray photoelectron spectroscopy. The matching surface energy on the surface of the barium titanate thin film is 43.12 mJ · m^-2, which leads to Stranski-Krastanov mode growth, and thus, high mobility is exhibited in pentacene-based TFTs.

Ti ³⁺ state in metal doped TiO ₂ based on lattice distortion that encouraged the formation of oxygen vacancy defects.

Pentacene-based organic thin-film transistors with solution-process hafnium oxide (HfOx) as gate insulating layer have been demonstrated. The solution-process HfOx could not only exhibit a high-permittivity (kappa = 11) dielectric constant but also has good dielectric strength. Moreover, the root-mean-square surface roughness and surface energy (gammas) on the surface of the HfOx layer were 1.304 nm and 34.24 mJ/cm², respectively. The smooth, as well as hydrophobic, surface of HfOx could facilitate the direct deposition of the pentacene film without an additional polymer treatment layer, leading to a high field-effect mobility of 3.8 cm²/(V middots) .

Solution processible poly(4-vinylphenol) is employed as a transistor dielectric material for low cost processing on flexible substrates at low temperatures. A 6,13-bis (triisopropylsilylethynyl) (TIPS) pentacene-graphene hybrid semiconductor is drop cast to fabricate bottom-gate and bottom-contact field-effect transistor devices on flexible and glass substrates under an ambient air environment. A few layers of graphene flakes increase the area in the conduction channel, and form bridge connections between the crystalline regions of the semiconductor layer which can change the surface morphology of TIPS pentacene films. The TIPS pentacene-graphene hybrid semiconductor-based organic thin film transistors (OTFTs) cross-linked with a poly(4-vinylphenol) gate dielectric exhibit an effective field-effect mobility of 0.076 cm(2) V(-1) s(-1) and a threshold voltage of -0.7 V at V(gs) = -40 V. By contrast, typical TIPS pentacene shows four times lower mobility of 0.019 cm(2) V(-1) s(-1) and a threshold voltage of 5 V. The graphene/TIPS pentacene hybrids presented in this paper can enhance the electrical characteristics of OTFTs due to their high crystallinity, uniform large-grain distribution, and effective reduction of crystal misorientation of the organic semiconductor layer, as confirmed by x-ray diffraction spectroscopy, atomic force microscopy, and optical microscopy studies.