To reliably operate anode-less solid-state Li metal batteries, wherein precipitated Li acts as the anode, stabilizing the interface between the solid electrolyte and electrode is crucial. The interface can be controlled by a metal interlayer on the electrolyte to form a Li alloy buffer that facilitates stable Li plating/stripping, thereby mitigating the loss of physical contact and preventing short circuits. However, the mechanism governing stable Li plating/stripping in the metal interlayer without degrading battery materials remains unclear owing to an incomplete understanding of the dynamic and complex electrochemical reactions in the solid state. Through multiple operando and post-mortem analyses of the Li deposition behavior in the morphology, chemistry and microstructure, a close correlation is found between the Li-metal alloying process with the microstructural evolution and electrochemical performance when Ag, Au, Zn, and Cu interlayers were adopted on the garnet-type solid electrolyte Li6.5La3Zr1.5Ta0.5O12. The Ag interlayer improved the interfacial stability enabled by Ag-dissolved Li, which inhibited dendritic growth, passing through the phase-separated Li-Ag alloy microstructure, while the other metals did not because of the Li plating at the Li-metal alloy/solid electrolyte interface. This work provides fundamental guidance for material selection and interface design, advancing the development of anode-less solid-state batteries.
Oxide ceramic electrolytes for realization of high-energy lithium metal batteries typically require high-temperature processes to achieve the desired phase formation and inter-particle sintering. However, such high-temperature processing can lead to compositional changes or mechanical deformation, compromising material reliability. Here, we introduce a disorder-driven, sintering-free approach to synthesize garnet-type solid electrolyte via the creation of an amorphous matrix followed by a single-step mild heat-treatment. The softened mechanical property (yield pressure, Py = 359.8 MPa) of disordered base materials enables the facile formation of a dense amorphous matrix and the preserving of inter-particle connectivity during crystallization. The formation of the cubic-phase garnet is triggered at a lowered temperature of 350 °C, achieving a Li+ ionic conductivity of 1.8 × 10–4 S/cm at 25 °C through a single-step mild heat treatment at 500 °C. The disorder-driven garnet solid electrolyte exhibits electrochemical performance comparable to conventional garnet solid electrolyte sintered at >1100 °C. These findings will promote the fabrication of uniform, thin, and wide solid electrolyte membranes, which is a significant hurdle in the commercialization of oxide-based lithium metal batteries, and demonstrate the untapped capabilities of garnet-type oxide solid electrolytes.
Intrinsically stretchable electronics is rapidly emerging as a transformative platform for next-generation electronics, offering novel form factors and enhanced capabilities. Herein, we report high-performance intrinsically stretchable thin-film transistors based on two-dimensional semiconducting flakes. Our n-type molybdenum disulfide transistors exhibit a maximum field-effect mobility up to 12.5 cm2V−1s−1 (average 8 cm2V−1s−1) and an on/off current ratio above 107, even under 20% strain, and demonstrate stable performance during cyclic stretching tests. Structural analysis revealed that mechanical strain was accommodated via interflake motions; the flakes are connected by weak van der Waals bonds, enabling effective stress relaxation within the transistor channel. Furthermore, charge transport from the source to the drain in the channel remains robust as long as the vertical interconnection between the flakes and the substrate is maintained under stretching. This strain accommodation mechanism offers a generalizable pathway for integrating van der Waals semiconductors into stretchable electronics and addresses the critical lack of high-performance stretchable n-type materials for complementary metal-oxide–semiconductor integration, paving the way for logically capable and scalable deformable systems.
31 July 2020 in Applied Science and Convergence Technology
HyunJoon Shin, Mikang Kim, Namdong Kim, Hyeong-Do Kim, Changhoon Jung, JaeGwan Chung , KiHong Kim, and Woo Sung Jeon. Applied Science and Convergence Technology 2020;29:71-6. https://doi.org/10.5757/ASCT.2020.29.4.071