A test pattern generator generates a pseudorandom test pattern that can be weighted to reduce the fault coverage in a built-in self-test. The objective of this paper is to propose a new weighted TPG for a scan-based BIST architecture. The motivation of this work is to generate efficient weighted patterns for enabling scan chains with reduced power consumption and area. Additionally, the pseudo-primary seed of TPG is maximized to obtain a considerable length in the weighted pseudorandom patterns. The maximum-length weighted patterns are executed by assigning separate weights to the specific scan chains using a weight-enabled clock. This approach reduces the hardware overhead and achieves a low power consumption of 26.7 nW. Moreover, the proposed weighted TPG is applied in two different test-per-scan BIST architectures and achieves accurate results. The weighted patterns are also generated with fewer switching transitions and higher fault coverages of 98.81% and 97.35% in two different BIST architectures. This process is observed with six other circuits under test as their scan chains. The simulation results are tested with a SilTerra 0.13 μm process on the Mentor Graphics IC design platform. Furthermore, the proposed weighted TPG is enlarged to a higher bit TPG, which is compared to accomplish the performance strategies. The experimental results of the proposed TPG design are compared and tabulated with existing potential TPG designs.

Many optimization algorithms were proposed in the past and optimized the distributed generation (DG) in the radial power distribution networks. However, most of the algorithms suffer from poor convergence and local optima stagnation issues due to the complicatedness of the problem. Several new algorithms and enhanced algorithms are recently developed to resolve numerous engineering problems. In this study, an optimization method is developed using the Osprey optimization algorithm (OOA) to determine the best possible solution for the complex DG placement problem. The proposed OOA method optimizes the appropriate size and location for a Type I and III DG to reduce the RDS’s real power losses (RPL). The adequacy of the proposed technique is investigated on the IEEE 33-bus and 118-bus radial PDNs. Furthermore, a real-time Malaysian 54-bus radial PDN is considered to verify the adaptability of the proposed approach. The proposed technique optimized DG placement has minimized the RPL in the IEEE 33-bus radial PDN by 52.47% (Type-I) and 71.95% (Type-III) and likewise, in the Malaysian 54-bus radial PDN the power losses are cut down by 72.56% (Type-I) and 94.88% (Type-III). Moreover, the proposed OOA technique provided better results than the popular and recent optimization techniques cited in literature.

Access control systems protect homes and businesses in the continually evolving security industry. This paper designs and implements a Raspberry Pi-based facial recognition door lock system using artificial intelligence and computer vision for reliability, efficiency, and usability. With the Raspberry Pi as its CPU, the system uses facial recognition for authentication. A camera module for real-time image capturing, a relay module for solenoid lock control, and OpenCV for image processing are essential. The system uses the DeepFace library to detect user emotions and adaptive learning to improve recognition accuracy for approved users. The device also adapts to poor lighting and distances, and it sends real-time remote monitoring messages. Some of the most important things that have been achieved include adaptive facial recognition, ensuring that the system changes as it is used, and integrating real-time notifications and emotion detection without any problems. Face recognition worked well in many settings. Modular architecture facilitated hardware–software integration and scalability for various applications. In conclusion, this study created an intelligent facial recognition door lock system using Raspberry Pi hardware and open-source software libraries. The system addresses traditional access control limits and is practical, scalable, and inexpensive, demonstrating biometric technology’s potential in modern security systems.

Abstract: The paper discuses the design of 1-bit full adder circuit using Shannon theorem. This proposed full adder circuit is used as one of the circuit component for implementation of Non- Restoring and Restoring divider circuits. The proposed adder and divider schematics are designed by using DSCH2 CAD tool and their layouts are generated by Microwind 3 VLSI CAD tool. The divider circuits are designed by using standard CMOS 0.35μm feature size and corresponding power supply 3.5 V. The parameters analyses are carried out by BSIM 4 analysis. We have compared the simulated results of the Shannon based divider circuit with CPL and CMOS adder cell based divider circuits. We have further compared the results with published results and observed that the proposed adder cell based divider circuit dissipates lower power, gives faster response, lower latency, low EPI and high throughput.

Melanoma is highly dangerous and can spread rapidly to other parts of the body. It has an increasing fatality rate among different types of cancer. Timely detection of skin malignancies can reduce overall mortality. Therefore, clinical screening methods require more time and accuracy for diagnosis. An automated, computer-aided system would facilitate earlier melanoma detection, thereby increasing patient survival rates. This paper identifies melanoma images using a Convolutional Neural Network. Skin images are preprocessed using Histogram Equalization and Gabor transforms. A Gabor filter-based Convolutional Neural Network (CNN) classifier trains and classifies the extracted features. We adopt Gabor filters because they are bandpass filters that transform a pixel into a multi-resolution kernel matrix, providing detailed information about the image. This study suggests a method with accuracy, sensitivity, and specificity of 98.58%, 98.66%, and 98.75%, respectively. This research supports SDGs 3 and 4 by facilitating early melanoma detection and enhancing AI-driven medical education.

Access control systems protect homes and businesses in the continually evolving security industry. This paper designs and implements a Raspberry Pi-based facial recognition door lock system using artificial intelligence and computer vision for reliability, efficiency, and usability. With the Raspberry Pi as its CPU, the system uses facial recognition for authentication. A camera module for real-time image capturing, a relay module for solenoid lock control, and OpenCV for image processing are essential. The system uses the Deep Face library to detect user emotions and adaptive learning to improve recognition accuracy for approved users. The device also adapts to poor lighting and distances and sends real-time remote monitoring messages. The system's average face identification time is 564.43 ms, and emotion detection time is 327.63ms, ensuring real-time performance. Major achievements include introducing adaptive facial recognition, ensuring the system evolves with usage, and smoothly integrating real-time notifications and emotion detection. Face recognition accuracy was high in various environments. Modular architecture facilitated hardware-software integration and scalability for varied applications. In conclusion, this study created an intelligent facial recognition door lock system using Raspberry Pi hardware and open-source software libraries. The system addresses traditional access control limits and is practical, scalable, and inexpensive, demonstrating biometric technology's potential in modern security systems.