There are two significant problems for the virtual synchronous generator (VSG) under non-ideal grid, including power coupling and current distortion. Although the virtual impedance (VI) is often used to decouple the control of active power and reactive power, it can neither suppress current harmonics nor solve current imbalance caused by non-ideal grid. Therefore, this paper proposes the configurable virtual impedance (CVI) approach to improve both the power coupling and the output current quality. The proposed methodology could aid the independent design of the virtual sequence impedance (VSI) for any harmonics, of which the virtual fundamental positive sequence impedance can be used to realize power decoupling, and the other VSI is designed to mitigate current aberration. Due to the requirements of VSI, the novel harmonic extraction algorithm (NHEA) based on state space model is presented to separate the positive-sequence component (PSC), negative-sequence component (NSC) and zero-sequence component (ZSC) in fundamental and harmonic current. Then, under this harmonic extractor, 90-degree-phase lead for each sequence component (SC) can be easily achieved by means of simple vector rotation. Excellent extraction performance of the NHEA and remarkable ability of current quality control and power decoupling regarding CVI are demonstrated by simulations and experiments.

Gallium Nitride (GaN) High Electron Mobility Transistor (HEMT) has been seen as one of the most potential power semiconductor devices since it's commercialized. However, the advantages of fast switching speed with low conduction resistance always have to compromise to the fast switching on evoked overvoltage. Though it has been realized that overvoltage problem arises from the joint effect of fast switch speed and parasitics, there is a lack of ways for quantitative analysis. This paper proposes a reliable circuit model based on which a quantitative way to analyze the cause of overvoltage and find optimized parameters to suppress it is detailed. A normalized method is adopted to make the analysis more general, and the voltage and current stress determined Safe Operation Area during the switching on process under the constraint of maximum overvoltage is detailed. The analysis is verified by a double pulse test experiment with the calculated and measured maximum overvoltage matching very well. The analysis can help to choose reasonable turn on speed and power loop parasitic inductance before the PCB manufacture with an acceptable maximum overvoltage guaranteed.

This article has presented a unified electrothermal behavior modeling method for both silicon carbide (SiC) metal oxide semiconductor field effect transistor ( mosfet ) and gallium nitride (GaN) high electron mobility transistor (HEMT). The electrothemal behavior of these two kind of devices in both the first and the third quadrant is accurately modeled with serval compact equations. A modeling data and optimization algorithm-based parameter extraction method have been proposed to replace the previous time consuming and labor intensive one. The proposed parameter fitting algorithm is a genetic algorithm and Levenberg–Marquardt combined optimization algorithm possessing the advantages of global optimization and fast convergence speed, and modeling data can come from both datasheets and measurement. The correctness and accuracy of the proposed modeling method has been verified by simulation and experiment result. Meanwhile, it has been proved that the proposed modeling method is applicable to several commercially available SiC mosfet s and GaN HEMTs.

Gallium nitride high electron mobility transistor (GaN HEMT) is liable to gate false turn-on problem when the gate crosstalk voltage exceeds its threshold voltage in the widely adopted phase-leg topology due to its low threshold voltage and high switching speed. Without considering the gate loop stray inductance, gate internal resistance, nonlinearity of parasitic capacitances and power loop stray parameters, traditional false turn-on analytical method is insufficient to support accurate analysis. And it has been found that GaN HEMT gate-source parasitic capacitance C _gs previously assumed constant is otherwise highly nonlinear and has strong impacts on the gate crosstalk voltage. This paper has measured C _gs by vector network analyzer and constructed an accurate nonlinear model of C _gs , based on which an accurate GaN HEMT behavior model is further fulfilled. The accuracy of the proposed behavior model has been verified by large amounts of experiment results. The proposed GaN HEMT model is used to accurately calculate gate crosstalk voltage and switching losses. Besides, false turn-on induced extra loss has been calculated and is adopted as a criterion to evaluate the severity of false turn-on and optimal design method for false turn-on suppression has been detailed further.

This paper focuses on introducing a modular cascaded battery energy storage system and establishing a mathematical model for both the AC and DC sides of the energy storage system. Based on this, a corresponding control strategy is proposed. To achieve a specific trade-off between switching times and output harmonics, a new hybrid modulation strategy (NHPWM) is proposed that combines the characteristics of NLM and CPS-PWM commonly used in traditional modular cascaded topologies. With this hybrid modulation strategy, the modulation of each sub-module can be flexibly configured, allowing the system to coordinate device loss and output harmonic characteristics in real time according to system requirements. Additionally, this paper proposes a calculation method based on the theory of double Fourier series expansion to derive the analytical solution of the NHPWM harmonic distribution, providing a theoretical basis for sub-module modulation mode configuration. Finally, the correctness and effectiveness of the modulation strategy and theoretical calculation were verified by simulation and experiment. The proposed method in this paper has demonstrated clear advantages over traditional HPWM and CPS-PWM in terms of harmonics and efficiency, as shown by the experimental results.

This paper has analyzed the defects of the traditional extended description function (EDF) based LLC small signal modeling method when driving light emitting diode (LED) load and proposed an accuracy improvement method. Detailed small signal model modeling methods have been deduced, and the accuracy of different modeling methods has been compared thoroughly. To suppress the second-order harmonic ripple in the direct current link-induced output current ripple, a quasi-resonant controller (QRC) is adopted to realize active ripple rejection (ARR). Considering the frequency of the second-order harmonic ripple changes with the grid voltage frequency, a single-phase software phase lock loop (SPLL) is adopted to extract the frequency of the second-order harmonic. By dynamically regulating the control parameter of the QRC according to the locked second-order frequency, output voltage ripple active rejection ability immune to grid voltage frequency deviation is obtained. Based on the deduced accurate small signal model, the digital controller is designed with stability, steady state and dynamics performance guaranteed. The accuracy of the proposed small signal model, the SPLL and the QRC-based ARR method has been verified at last.