In April 2014, a nano-satellite project was initiated at the University of Sidi Mohamed Ben Abdellah, Fez, Morocco in order to give graduate students the rare opportunity to experience all the challenging aspects associated with satellite design, manufacture, launch and operation. The nano-satellite follows the design concept of a 1U CubeSat, which has the shape of a cube of 10cm 3 edge, of 1.33kg mass and which consumes a power of 1W. The initial orbital parameters of the nano-satellite were set to a circular sun-synchronous Low Earth Orbit (LEO) with an inclination of 90°. The operation time was set to two years. To ensure a successful flight, it is necessary, within the scope of the project, to establish an adequate power budget to ensure that the consumed power on board does not exceed the produced power. In this work we analyze deeply the available energy required per single orbit, and summarize the estimated produced and consumed power for several operation modes of the nanosatellite in the execution of its mission.
Communication links between a satellite and the ground station are subject to a lot of impairments and losses, such as noise and atmospheric attenuations, and Doppler shift effects. It is therefore paramount to design a reliable link that caters for these impairments. The main challenge is to design a communication subsystem that provides enough transmission power to close the link, while being power efficient and at the same time delivering the required link characteristics in terms of effective bit rate and bit error rate. In this paper, we present a link budget analysis for communication between a nano-satellite orbiting at LEO and a low cost mission control ground station. The analysis employs relevant deterministic, empirical, and statistical models as prediction tools, to make pertinent choices for both the flight nano-satellite compliant communication board, on the one hand and the ground station hardware and link protocols, on the other hand.
While there is no rigorous framework to develop nanosatellites flight software, this manuscript aimed to explore and establish processes to design a reliable and reusable flight software architecture for cost-efficient student Cubesat missions such as Masat-1. Masat-1 is a 1Unit CubeSat, developed using a systems engineering approach, off-the-shelf components and open-source software tools. It was our aim to use it as a test-bed platform and as an initial reference for Cubesat flight software development in Morocco. The command and data handling system chosen for Masat-1 is a system-on-module-embedded computer running freeRTOS. A real-time operating system was used in order to simplify the real-time onboard management. To ensure software design reliability, modularity, reusability and extensibility, our solution follows a layered service oriented architectural pattern, and it is based on a finite state machine in the application layer to execute the mission functionalities in a deterministic manner. Moreover, a client-server model was elected to ensure the inter-process communication and resources access while using uniform APIs to enhance cross-platform data exchange. A hierarchical fault tolerance architecture was also implemented after a systematic assessment of the Masat-1 mission risks using reliability block diagrams (RBDs) and functional failure mode, effect and criticality analysis (FMECA).
This paper presents a System-on-Chip approach (SoC), exploiting the availability and capacity of SRAM-based FPGA technology to design and implement an on-board computer system (OBC) for use in low earth orbit (LEO) nano-satellite. This work is part of a University project that aims to develop the first Moroccan university nano-satellite based on the “CubeSat” standard. As such, the proposed OBC is designed to provide a payload and a testbed for space-based reconfigurable platform. The hardware and software reconfigurable architecture of the system is based on Xilinx's Spartan-6 FPGA. The proposed design of the OBC takes into account the constraints inherent to space environment (sensitivity to ionizing radiation), and uses mitigation techniques that combine hardware and software redundancy to improve system availability and reliability. The paper also presents the guidelines for possible implementation.
This paper presents a MicroBlaze-based embedded system that uses lockstep concept and reconfiguration technique to enhance system reliability. The design is based on two redundant MicroBlaze soft processors run in lockstep, and it makes use of the Xilinx IP core MicroBlaze Comparator to signal transient faults or permanent hardware faults. To recovery, any detected error will triggers run-time full reconfiguration process. The reconfiguration technique is based on the Internal Configuration Access Port (ICAP) primitive in the Xilinx FPGA fabric and we used Xilinx LogiCORE IP AXI HWICAP (Advanced eXtensible Interface Hardware ICAP) core to write software programs that modify the circuit structure and functionality during run-time. The hardware and software design of the embedded platform is implemented on a Spartan-6 evaluation board (i.e., SP605) using the Embedded Development Kit (EDK) prepared by Xilinx company.
About Me
Prof Assistant in EST electrical engineering department at university sidi Mohammed ben abdellah in Fes Morocco
Prof Assistant in EST electrical engineering department at university sidi Mohammed ben abdellah in Fes Morocco