Hyunsang Hwang

Hyunsang Hwang


Research Focus & Metrics

Academic Career Length

26Years (2001-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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3 June 2016 in Science Advances
Verified
Journal Article
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WXWentao Xu
Wentao Xu
SMSung-Yong Min
Sung-Yong Min
HHHyunsang Hwang
Hyunsang Hwang
TLTae-Woo Lee
Tae-Woo Lee
Researchers report an organic nanowire artificial synapse that emulates working principles and energy consumption of biological synapses.

1 September 2019 in APL Materials
Verified
Journal Article
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SOS. Oh
S. Oh
HHHyunsang Hwang
Hyunsang Hwang
IYI. K. Yoo
I. K. Yoo
Ferroelectric materials are promising candidates for synaptic weight elements in neural network hardware because of their nonvolatile multilevel memory effect. This feature is crucial for their use in mobile applications such as inference when vector matrix multiplication is performed during portable artificial intelligence service. In addition, the adaptive learning effect in ferroelectric polarization has gained considerable research attention for reducing the CMOS circuit overhead of an integrator and amplifier with an activation function. In spite of their potential for a weight and a neuron, material issues have been pointed out for commercialization in conjunction with CMOS processing and device structures. Herein, we review ferroelectric synaptic weights and neurons from the viewpoint of materials in relation to device operation, along with discussions and suggestions for improvement. Moreover, we discuss the reliability of HfO2 as an emerging material and suggest methods to overcome the scaling issue of ferroelectrics.

14 November 2018 in Faraday Discussions
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Journal Article
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KMK. Moon
K. Moon
SLS. Lim
S. Lim
JPJ. Park
J. Park
CSC. Sung
C. Sung
SOS. Oh
S. Oh
HHHyunsang Hwang
Hyunsang Hwang
Hardware artificial neural network (ANN) systems with high density synapse array devices can perform massive parallel computing for pattern recognition with low power consumption. To implement a neuromorphic system with on-chip training capability, we need to develop an ideal synapse device with various device requirements, such as scalability, MLC characteristics, low power operation, data retention, and symmetric/linear conductance changes under potentiation/depression modes. Although various devices have been proposed for synapse applications, they have limitations for application in neuromorphic systems. In this paper, we will cover various RRAM synapse devices, such as filamentary switching RRAM (HfOx, TaOx, Cu-CBRAM) and analog RRAM devices, based on interface resistive switching (Pr0.7Ca0.3MnOx and TiOx) and ferroelectric polarization (HfZrOx). By optimizing potentiation/depression conditions, we could improve the conductance linearity and MLC characteristics of filamentary synapse devices. Interface RRAM has better MLC characteristics with limited retention and conductance linearity. By controlling the reactivity of metal electrodes and the oxygen concentration in oxides, we can modulate the synapse characteristics. Metal-Ferroelectric-Insulator-Semiconductor (MFIS) FET devices exhibit good retention characteristics and analog memory characteristics due to polarization. Based on various synapse device characteristics, we have estimated the pattern recognition accuracy of MNIST handwritten digits and CIFAR-10 datasets. We have confirmed that synapse device characteristics directly affect the pattern recognition accuracy of ANNs. In order to simultaneously satisfy all the requirements of synapse devices, it is necessary to develop new technology capable of controlling the movement of oxygen vacancies and metal ions at the atomic scale. Considering the limited synapse characteristics of current 2-terminal RRAM devices, hardware ANNs capable of only off-chip training can be constructed by optimizing the current RRAM devices by limiting the bit number. A 3-terminal synapse device or a device based on a new operation principle should be developed as an alternative for on-chip training applications.

25 February 2019 in Advanced Electronic Materials
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Journal Article
Closed access
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DLDonguk Lee
Donguk Lee
MKMyonghoon Kwak
Myonghoon Kwak
KMKibong Moon
Kibong Moon
WCWooseok Choi
Wooseok Choi
JPJaehyuk Park
Jaehyuk Park
HHHyunsang Hwang
Hyunsang Hwang

28 August 2012 in ACS Nano
Verified
Journal Article
Closed access
WLWootae Lee
Wootae Lee
JPJubong Park
Jubong Park
SKSeonghyun Kim
Seonghyun Kim
JWJiyong Woo
Jiyong Woo
JSJungho Shin
Jungho Shin
HHHyunsang Hwang
Hyunsang Hwang

11 December 2019 in Scientific Reports
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Journal Article
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REVANNATH DNYANDEO NIKAMREVANNATH DNYANDEO NIKAM
REVANNATH DNYANDEO NIKAM
MKMyonghoon Kwak
Myonghoon Kwak
JLJongwon Lee
Jongwon Lee
KRKrishn Gopal Rajput
Krishn Gopal Rajput
WBWritam Banerjee
Writam Banerjee
HHHyunsang Hwang
Hyunsang Hwang
All solid-state lithium-ion transistors are considered as promising synaptic devices for building artificial neural networks for neuromorphic computing. However, the slow ionic conduction in existing electrolytes hinders the performance of lithium-ion-based synaptic transistors. In this study, we systematically explore the influence of ionic conductivity of electrolytes on the synaptic performance of ionic transistors. Isovalent chalcogenide substitution such as Se in Li3PO4 significantly reduces the activation energy for Li ion migration from 0.35 to 0.253 eV, leading to a fast ionic conduction. This high ionic conductivity allows linear conductance switching in the LiCoO2 channel with several discrete nonvolatile states and good retention for both potentiation and depression steps. Consequently, optimized devices demonstrate the smallest nonlinearity ratio of 0.12 and high on/off ratio of 19. However, Li3PO4 electrolyte (with lower ionic conductivity) shows asymmetric and nonlinear weight-update characteristics. Our findings show that the facilitation of Li ionic conduction in solid-state electrolyte suggests potential application in artificial synapse device development.