Integrated on-board battery chargers (OBCs) have been recently introduced as an optimal/elegant solution to increase electric vehicle (EV) market penetration as well as minimize overall EV cost. Unlike conventional off-board and on-board battery chargers, integrated OBCs exploit the existing propulsion equipment for battery charging without extra bulky components and/or dedicated infrastructure. OBCs are broadly categorized into three-phase and single-phase types with unidirectional or bidirectional power flow. This paper starts with surveying the main topologies introduced in the recent literature employing either induction or permanent magnet motors to realize fully integrated slow (single-phase) and fast (three-phase) on-board EV battery charging systems, with emphasis on topologies that entail no or minimum hardware reconfiguration. Although, permanent magnet (PM) motors with conventional double-layer distributed winding layouts have been deployed in most commercial EV motors, the non-overlapped fractional slot concentrated winding (FSCW) has been the prevailing choice in the most recent permanent magnet motor designs due to its outstanding operational merits. Hence, a thorough investigation of the impact different FSCW stator winding designs have on machine performance under the charging process is presented in this paper. To this end, the induced magnet losses, which represent a challenging demerit of the FSCW, have been used to compare different topologies under both propulsion and charging operation modes. Based on the introduced comparative study, the optimal slot/pole combinations that correspond to the best compromise under both operational modes have been highlighted.

This paper presents a new configuration for integrated on-board battery chargers of electric vehicles (EVs) incorporating symmetrical six-phase machines. The configuration proposes an exclusive utilization of a nine-switch converter (NSC) along with the machine windings during both propulsion and charging of EVs. The proposed configuration has the advantage of employing a reduced number of components in both the EV (on-board) and charging station (off-board), with the privilege of avoiding machine electromagnetic torque production during charging/vehicle-to-grid (V2G) mode of operation. During charging/V2G mode, the NSC is turned into a conventional three-phase pulse width modulation rectifier and is directly connected to the three-phase mains through the machine windings. Conventional three-phase transformers can be employed for galvanic isolation. Switching between propulsion and charging modes is carried out using a simple hardware reconfiguration. Control schemes for both propulsion and charging/V2G modes are elaborated, along with the principles of operation of the NSC. Experimental results are provided to validate the theoretical deductions for the different operating modes.

One of the main drawbacks of nonoverlapped coils in fractional slot concentrated winding permanent magnet (PM) machines are the high eddy current losses in both rotor core and permanent magnets induced by the asynchronous harmonics of the armature reaction field. It has been shown in the literature that the reduction of low space harmonics can effectively reduce the rotor eddy current losses. This paper shows that employing a combined star-delta winding to a three-phase PM machine with fractional slot windings and with a number of slots equal to 12, or its multiples, yields a complete cancellation to the fundamental magneto-motive force (MMF) component, which significantly reduces the induced rotor eddy current. Besides, it offers a slight increase in machine torque density. A case study on the well-known 12-slot/10-pole PM machine is conducted to explore the proposed approach. With the same concept, the general n-phase PM machine occupying 4n slots and with a dual n-phase winding is then proposed. This configuration offers a complete cancelation of all harmonics below the torque producing MMF component. Hence, the induced eddy currents in both rotor core and magnets are significantly reduced. The winding connection and the required number of turns for both winding groups are also given. The concept is applied to a 20-slot/18-pole stator with a dual five-phase winding, where the stator winding is connected as a combined star/pentagon connection. The proposed concept is assessed through a simulation study based on 2-D finite element analysis.

Fault identification in Photovoltaic (PV) array is a contemporary research topic motivated by the higher penetration levels of PV systems in recent electrical grids. Therefore, this work aims to define an optimal Machine learning (ML) structure of automatic detection and diagnosis algorithm for common PV array faults, namely, permanent (Arc Fault, Line-to-Line, Maximum Power Point Tracking unit failure, and Open-Circuit faults), and temporary (Shading) under a wide range of climate datasets, fault impedances, and shading scenarios. To achieve the best-fit ML structure, three distinct ML classifiers are compared, namely, Decision Tree (DT) based on different splitting criteria, K-Nearest Neighbors (KNN) based on the different metrics of distance and weighting functions, and Support Vector Machine (SVM) based on different Kernel functions and multi-classification approaches. Also, Bayesian Optimization is adopted to assign the optimal hyperparameters to the fault classifiers. To investigate the performance of classifiers reported, both simulation and experimental case studies are carried out and presented.

This paper presents an indirect vector control scheme with an improved flux pattern using third harmonic injection. The control objective is to independently control both flux and torque and to generate a nearly rectangular air-gap flux, resulting in improved machine power density. If there is a proportional relation between the third harmonic and fundamental plane currents, variable misalignment between fundamental and third air-gap flux components occurs with varying mechanical loading. Due to this misalignment, saturation may take place. Accordingly, the total flux is saturated and iron loss increases. Hence, coupling results between different sequence planes. Instead of a proportional relation between the current components, direct and quadrature current components of the injected third harmonic current reference are a function of the fundamental direct and quadrature reference current components, respectively. These functions ensure that the air-gap flux is near rectangular with a maximum value of 1 p.u. from no load to full load. Moreover, this controller guarantees complete decoupling between the sequence planes. An eleven-phase induction machine is used to validate the proposed controller experimentally, while supporting simulation results and theoretical analysis use both MATLAB and finite element platforms.

Two-level voltage-source converters and half-bridge modular multilevel converters are among the most popular types of HVDC converters. One of their serious drawbacks is their vulnerable nature to dc-side faults, since the freewheeling diodes act as a rectifier bridge and feed the dc faults. The severity of dc-side faults can be limited by connecting double thyristor switches across the semiconductor devices. By turning them on, the ac current contribution into the dc side is eliminated and the dc-link current will freely decay to zero. The main disadvantages of this method are: high dv/dt stresses across thyristors during normal conditions, and the absence of bypassing for the freewheeling diodes during dc faults since they are sharing the fault current with thyristors. This paper proposes combining and connecting the double thyristor switches across the ac output terminals of the HVDC converter. The proposed protection scheme provides advantages, such as lower dv/dt stresses and lower voltage rating of thyristor switches in addition to providing full segregation between the converter semiconductor devices and ac grid during dc-side faults. A simulation case study has been carried out to demonstrate the effectiveness of the proposed scheme.