Chaotic oscillators have been designed with embedded systems like field-programmable gate arrays (FPGAs), and applied in different engineering areas. However, the majority of works do not detail the issues when choosing a numerical method and the associated electronic implementation. In this manner, we show the FPGA implementation of chaotic and hyper-chaotic oscillators from the selection of a one-step or multi-step numerical method. We highlight that one challenge is the selection of the time-step h to increase the frequency of operation. The case studies include the application of three one-step and three multi-step numerical methods to simulate three chaotic and two hyper-chaotic oscillators. The numerical methods provide similar chaotic time-series, which are used within a time-series analyzer (TISEAN) to evaluate the Lyapunov exponents and Kaplan–Yorke dimension ($D_{KY}$) of the (hyper-)chaotic oscillators. The oscillators providing higher exponents and $D_{KY}$ are chosen because higher values mean that the chaotic time series may be more random to find applications in chaotic secure communications. In addition, we choose representative numerical methods to perform their FPGA implementation, which hardware resources are described and counted. It is highlighted that the Forward Euler method requires the lowest hardware resources, but it has lower stability and exactness compared to other one-step and multi-step methods.

This study compares EFORK3, the implemented memoryless two-stage recurrence (M2sFRK), and the finite-memory Grünwald–Letnikov (GL) method on STM32 microcontrollers across the Chen, Liu, and Hammouch–Mekkaoui systems, the STM32F746 and STM32H755, and floating- or fixed-point arithmetic. A full-history Caputo Adams–Bashforth–Moulton (ABM) solution whose numerical accuracy was assessed through step size refinement provides the numerical reference; the C numerical routines were evaluated through short-horizon comparisons, independent bit-exact fixed-point checks, and release-build acceptance tests. Physical timing and dense trajectory measurements characterized the solver call cost and reconstructed finite-time dynamics, yielding positive largest-exponent estimates; matched F746 and H755 captures were bit-identical. M2sFRK bitstreams were evaluated with NIST SP 800-22, PractRand, and TestU01, and the findings varied by system and arithmetic representation; under some fixed-point conditions, distinct initial conditions produced identical sequences. Overall, the implemented M2sFRK recurrence required the fewest cycles and least static RAM but does not generally approximate the same Caputo initial-value problem for $0<q<1$; GL had a lower short-horizon error than EFORK3 but required history storage.