The electrosynthesis of formate from CO₂ can mitigate environmental issues while providing an economically valuable product. Although stannic oxide is a good catalytic material for formate production, a metallic phase is formed under high reduction overpotentials, reducing its activity. Here, using a fluorine-doped tin oxide catalyst, a high Faradaic efficiency for formate (95% at 100 mA cm⁻²) and a maximum partial current density of 330 mA cm⁻² (at 400 mA cm⁻²) is achieved for the electroreduction of CO₂. Furthermore, the formate selectivity (≈90%) is nearly constant over 7 days of operation at a current density of 100 mA cm⁻². In-situ/operando spectroscopies reveal that the fluorine dopant plays a critical role in maintaining the high oxidation state of Sn, leading to enhanced durability at high current densities. First-principle calculation also suggests that the fluorine-doped tin oxide surface could provide a thermodynamically stable environment to form HCOO* intermediate than tin oxide surface. These findings suggest a simple and efficient approach for designing active and durable electrocatalysts for the electrosynthesis of formate from CO₂.

Memristors, or memristive devices, have attracted tremendous interest in neuromorphic hardware implementation. However, the high electric-field dependence in conventional filamentary memristors results in either digital-like conductance updates or gradual switching only in a limited dynamic range. Here, we address the switching parameter, the reduction probability of Ag cations in the switching medium, and ultimately demonstrate a cluster-type analogue memristor. Ti nanoclusters are embedded into densified amorphous Si for the following reasons: low standard reduction potential, thermodynamic miscibility with Si, and alloy formation with Ag. These Ti clusters effectively induce the electrochemical reduction activity of Ag cations and allow linear potentiation/depression in tandem with a large conductance range (~244) and long data retention (~99% at 1 hour). Moreover, according to the reduction potentials of incorporated metals (Pt, Ta, W, and Ti), the extent of linearity improvement is selectively tuneable. Image processing simulation proves that the Ti_4.8%:a-Si device can fully function with high accuracy as an ideal synaptic model.

Among many artificial neural networks, the research on Spike Neural Network (SNN), which mimics the energy-efficient signal system in the brain, is drawing much attention. Memristor is a promising candidate as a synaptic component for hardware implementation of SNN, but several non-ideal device properties are making it challengeable. In this work, we conducted an SNN simulation by adding a device model with a non-linear weight update to test the impact on SNN performance. We found that SNN has a strong tolerance for the device non-linearity and the network can keep the accuracy high if a device meets one of the two conditions: 1. symmetric LTP and LTD curves and 2. positive non-linearity factors for both LTP and LTD. The reason was analyzed in terms of the balance between network parameters as well as the variability of weight. The results are considered to be a piece of useful prior information for the future implementation of emerging device-based neuromorphic hardware.

One long-standing goal in the emerging neuromorphic field is to create a reliable neural network hardware implementation that has low energy consumption, while providing massively parallel computation. Although diverse oxide-based devices have made significant progress as artificial synaptic and neuronal components, these devices still need further optimization regarding linearity, symmetry, and stability. Here, we present a proof-of-concept experiment for integrated neuromorphic computing networks by utilizing spintronics-based synapse (spin-S) and neuron (spin-N) devices, along with linear and symmetric weight responses for spin-S using a stripe domain and activation functions for spin-N. An integrated neural network of electrically connected spin-S and spin-N successfully proves the integration function for a simple pattern classification task. We simulate a spin-N network using the extracted device characteristics and demonstrate a high classification accuracy (over 93%) for the spin-S and spin-N optimization without the assistance of additional software or circuits required in previous reports. These experimental studies provide a new path toward establishing more compact and efficient neural network systems with optimized multifunctional spintronic devices.

Neuromorphic computing is of great interest among researchers interested in overcoming the von Neumann computing bottleneck. A synaptic device, one of the key components to realize a neuromorphic system, has a weight that indicates the strength of the connection between two neurons, and updating this weight must have linear and symmetric characteristics. Especially, a transistor-type device has a gate terminal, separating the processes of reading and updating the conductivity, used as a synaptic weight to prevent sneak path current issues during synaptic operations. In this study, we fabricate a top-gated flash memory device based on two-dimensional (2D) materials, MoS₂ and graphene, as a channel and a floating gate, respectively, and Al₂O₃ and HfO₂ to increase the tunneling efficiency. We demonstrate the linear weight updates and repeatable characteristics of applying negative/positive pulses, and also emulate spike timing-dependent plasticity (STDP), one of the learning rules in a spiking neural network (SNN).