In this paper, a new single-stage half-bridge (HB) resonant LLC converter additionally employing one resonant capacitor and two relays with one package is proposed, compared with a single-stage HB LLC converter. Moreover, a center-tapped transformer is replaced with a coupled transformer. Since the proposed converter changes the turns-ratio of the coupled transformer using two relays according to low or high input voltage range, it can decrease the range of its needed voltage gain. It means that the proposed converter can be designed with large transformer magnetizing inductance compared with the conventional single-stage HB LLC converter. As a result, the primary conduction and turn-off losses are reduced. Moreover, in low input voltage range, it has smaller total primary wire resistance of the transformer due to parallel connection of the coupled transformer, which decreases its conduction loss. In addition, additionally employed small-sized components can be inserted to the conventional system. To confirm the operation, features, and validity of the proposed converter, universal input with low line (90Vac~132Vac) and high line (180Vac~264Vac) and 16.5V/60W output laboratory prototype targeting laptop adapters with wide-input-voltage range is built and tested.

In the standby stage of a server power supply, the flyback converter has been widely used due to its simple structure and low cost. However, since the flyback converter suffers from high voltage stress and a large transformer, it degrades the efficiency and power density of the server power supply. To relieve these drawbacks, this paper proposes a new standby structure where a flyback converter is integrated with a boost PFC converter. The proposed standby structure can relieve the high voltage stress and eliminate the large transformer of the conventional flyback converter because the primary side of the flyback converter is merged with the boost PFC converter. Thus, the proposed structure can achieve high efficiency and high power density in the standby stage. Furthermore, it can help the boost PFC converter achieve a soft switching operation, which results in a high-efficiency PFC stage. As a result, the proposed structure improves the overall efficiency and power density of the server power supply. The validity of the proposed structure is confirmed by a prototype with $100-240V_{rms}$ AC input, 750W PFC output, and 12V/2A standby output.

In this paper, a new type of interleaved high step-up converter including a coupled inductor is proposed. The proposed converter has an interleaved configuration on the input side to reduce the ripple of the input current and increase the power level. Moreover, a stacked structure on the output side provides a high input/output (I/O) voltage gain. In addition, the proposed converter can avoid an extreme duty cycle, causing larger conduction losses, by combining a coupled inductor and a lossless clamp circuit with an interleaved method. These increase the efficiency by making the semiconductor device a low voltage stress and allowing the use of components with low voltage ratings. Also, the energy stored in the leakage inductor in the coupled inductor can be recycled to the output side, the MOSFETs can be partially ZCS turned ON, and the diode reverse recovery problem can be alleviated. Finally, a laboratory prototype circuit with an input voltage of 24V, an output voltage of 400V and an output of 500W was implemented to demonstrate the performance of the proposed converter.

The LLC resonant converter is one of the most attractive topologies in many applications, due to its simple structure and zero-voltage-switching capability. However, under wide-input-voltage condition, it has large primary conduction and turn-off switching losses, because of small magnetizing inductance. Thus, in this paper, the LLC resonant converter using three switches is proposed for high-efficiency under wide universal ac input voltage. These three switches can make two operating modes of LLC resonant converter according to low/high line input conditions. As a result, the proposed converter can be designed with larger magnetizing inductance, resulting in a high efficiency. The validity of the proposed converter is verified with 60W prototype for high-efficiency, almost maintaining the system size, compared with the conventional LLC converter.

In this article, we deal with the onboard fast energy conversion system (FECS) that is installed in a wireless railway train (WRT), which receives electrical energy not from the wayside device but from the onboard device when traveling between stations, after getting such energy stored by fast charging during its stopping time at a station. The adopted input-series and output-independent architecture and the interleaving topology can reduce the size and weight of onboard FECS for 1500 V, which is double the operating voltage of the existing 750 V operating voltage. This allows 1200 V class insulated-gate bipolar transistor applications to increase switching frequency and reduce passive component volume. In addition, in order to secure system stability, which is important in any transportation system, a WRT must operate on the basis of simple control. Through a simple and efficient balance control based on a variable current limiter, the input voltage unbalance caused by the input voltage sharing is resolved. Also, it can control charging and discharging based on the energy moving characteristic of the train operation pattern and connection with a high-power energy storage pack. The performance of the onboard FECS at 1500 V with the proposed method is experimentally verified on a 600 kW prototype system.

The phase-shifted full-bridge (PSFB) converter with synchronous rectifier (SR) is one of the most attractive dc-dc converters for the server power supply due to its high power capability and small secondary ripple current with the output inductor. Moreover, it can more reduce the secondary conduction loss by using parallel-connected MOSFETs in SR. However, due to large input capacitance of the parallel-connected MOSFETs in SR, the PSFB converter has large SR gate driving loss, which particularly degrades the light load efficiency. Thus, in this paper, one additional resistor is added to the conventional SR gate driving circuit to recycle the gate driving energy. As a result, the proposed circuit can improve the light load efficiency of the PSFB converter without operation mode change, additional controls, and complex circuits. The most advantage of the proposed circuit is that it is very simple and available to any other SR gate driver IC. The validity of the proposed circuit is confirmed by experimental results from a prototype with 340-400V input and 12V/66.66A output.