This paper presents an implantable bio-impedance measurement system for cardiac pacemakers. The fully integrated system features a low power analog front-end and pulse width modulated output. The bio-impedance readout benefits from voltage to time conversion to achieve a very low power consumption for wirelessly transmitting the data outside the body. The proposed IC is fabricated in a 0.18 μm CMOS process and is capable of measuring the bio-impedance at 2 kHz over a wide dynamic range from ${\text{100}}\,\Omega $ to $\text{3.3}{\;\text{k}\Omega }$ with $\text{1.35}\;\Omega _{{\rm{rms}}}$ accuracy and ${\text{1}}\; {\mu}\text{A}$ maximum current injection while consuming just $\text{1.55}{\;{\mu}}{\text{A}}$ from a 1 V supply.

This brief presents a time-domain model for the slew rate of CMOS two-stage Miller compensated operational transconductance amplifiers. The effects of both the first- and second-stage currents are considered in this model and a simple analytical expression is given in terms of the compensation and load capacitors, output voltage change, and device sizes. HSPICE simulation results are provided to show the validity of the proposed model using a 0.25-/spl mu/m CMOS technology.

The authors present a new fully differential operational transconductance amplifier (OTA) for low-voltage and fast-settling switched-capacitor circuits in pure digital CMOS technology. The proposed two-stage OTA is a hybrid class A/AB that combines a folded cascode as the first stage with active current mirrors as the second stage. Owing to the class AB operation in the second stage, slew limiting occurs only in the first stage, resulting in low power dissipation for switched-capacitor circuits. It employs a novel hybrid cascode compensation scheme, merged Ahuja and improved Ahuja style compensations, for fast settling. A design procedure for the minimum settling time of the proposed OTA is described. To demonstrate the efficiency of the proposed OTA and its compensation method three design examples are also provided.