Neuromorphic computing memristors are attractive to construct low-power- consumption electronic textiles due to the intrinsic interwoven architecture and promising applications in wearable electronics. Developing reconfigurable fiber-based memristors is an efficient method to realize electronic textiles that capable of neuromorphic computing function. However, the previously reported artificial synapse and neuron need different materials and configurations, making it difficult to realize multiple functions in a single device. Herein, a textile memristor network of Ag/MoS₂/HfAlO_x/carbon nanotube with reconfigurable characteristics was reported, which can achieve both nonvolatile synaptic plasticity and volatile neuron functions. In addition, a single reconfigurable memristor can realize integrate-and-fire function, exhibiting significant advantages in reducing the complexity of neuron circuits. The firing energy consumption of fiber-based memristive neuron is 1.9 fJ/spike (femtojoule-level), which is at least three orders of magnitude lower than that of the reported biological and artificial neuron (picojoule-level). The ultralow energy consumption makes it possible to create an electronic neural network that reduces the energy consumption compared to human brain. By integrating the reconfigurable synapse, neuron and heating resistor, a smart textile system is successfully constructed for warm fabric application, providing a unique functional reconfiguration pathway toward the next-generation in-memory computing textile system.

In-memory computing may enable multiply-accumulate (MAC) operations, which are the primary calculations used in artificial intelligence (AI). Performing MAC operations with high capacity in a small area with high energy efficiency remains a challenge. In this work, we propose a circuit architecture that integrates monolayer MoS₂ transistors in a two-transistor–one-capacitor (2T-1C) configuration. In this structure, the memory portion is similar to a 1T-1C Dynamic Random Access Memory (DRAM) so that theoretically the cycling endurance and erase/write speed inherit the merits of DRAM. Besides, the ultralow leakage current of the MoS₂ transistor enables the storage of multi-level voltages on the capacitor with a long retention time. The electrical characteristics of a single MoS₂ transistor also allow analog computation by multiplying the drain voltage by the stored voltage on the capacitor. The sum-of-product is then obtained by converging the currents from multiple 2T-1C units. Based on our experiment results, a neural network is ex-situ trained for image recognition with 90.3% accuracy. In the future, such 2T-1C units can potentially be integrated into three-dimensional (3D) circuits with dense logic and memory layers for low power in-situ training of neural networks in hardware.

The data processing efficiency of traditional computers is suffering from the intrinsic limitation of physically separated processing and memory units. Logic-in-memory and brain-inspired neuromorphic computing are promising in-memory computing paradigms for improving the computing efficiency and avoiding high power consumption caused by extra data movement. However, memristors that can conduct digital memcomputing and neuromorphic computing simultaneously are limited by the difference in the information form between digital data and analogue data. In order to solve this problem, this paper proposes a flexible low-dimensional memristor based on boron nitride (BN), which has ultralow-power non-volatile memory characteristic, reliable digital memcomputing capabilities, and integrated ultrafast neuromorphic computing capabilities in a single in situ computing system. The logic-in-memory basis, including FALSE, material implication (IMP), and NAND, are implemented successfully. The power consumption of the proposed memristor per synaptic event (198 fJ) can be as low as biology (fJ level) and the response time (1 μs) of the neuromorphic computing is four orders of magnitude shorter than that of the human brain (10 ms), paving the way for wearable ultrahigh efficient next-generation in-memory computing architectures.