An exploding demand for processing capabilities related to the emergence of the Internet of Things (IoT), Artificial Intelligence (AI), and big data, has led to the quest for increasingly efficient ways to expeditiously process the rapidly increasing amount of data. These ways include different approaches like improved devices capable of going further in the more Moore path but also new devices and architectures capable of going beyond Moore and getting more than Moore. Among the solutions being proposed, Stochastic Computing has positioned itself as a very reasonable alternative for low-power, low-area, low-speed, and adjustable precision calculations—four key-points beneficial to edge computing. On the other hand, chaotic circuits and systems appear to be an attractive solution for (low-power, green) secure data transmission in the frame of edge computing and IoT in general. Classical implementations of this class of circuits require intensive and precise calculations. This paper discusses the use of the Stochastic Computing (SC) framework for the implementation of nonlinear systems, showing that it can provide results comparable to those of classical integration, with much simpler hardware, paving the way for relevant applications.

An exploding demand for processing capabilities related to the emergence of the IoT, AI and big data, has led to the quest for increasingly efficient ways to expeditiously process the rapidly increasing amount of data. These ways include different approaches like improved devices capable of going further in the more Moore path, but also new devices and architectures capable of going beyond Moore and getting more than Moore. Among the solutions being proposed, Stochastic Computing has positioned itself as a very reasonable alternative for low-power, low-area, low-speed, and adjustable precision calculations; four key-points beneficial to edge computing. On the other hand, chaotic circuits and systems appear to be an attractive solution for (low-power, green) secure data transmission in the frame of edge computing and IoT in general. Classical implementations of this class of circuits require intensive and precise calculations. This paper discusses the use of the SC framework for the implementation of nonlinear systems, showing that it can provide results comparable to those of classical integration, with much simpler hardware, paving the way for relevant applications.

Cellular Nonlinear Networks (CNN) were intro-duced by Leon Chua and Lin Yang in 1988, and are shown to be a very powerful parallel computing architecture. Later on, CNN have been designed using the processing and memory capabilities of memristors. On the other hand, Stochastic Computing (SC) has been proposed as a way to reduce the number of processing elements in a circuits. In this work, we propose using SC to implement a CNN. Specifically, we choose a memristor-based CNN, where all the operations are done using SC. As an example of application, we have used Matlab to create a CNN that performs edge detection on 512x512 grey-scale images. Results show excellent capability, while at the same time the low number of needed elements will allow to implement it in a low cost FPGA-based system.

In this paper we propose a mixed-signal circuit, emulating memristive behaviour. In specific, the design and implementation of a novel, low cost Switched Capacitor Memristor Emulator (SCME), is presented and studied. The proposed emulator utilizes the well-known switched capacitor technique for controlling its resistivity, thus creating its memristance. A FPGA has been employed for producing the necessary control signals according the emulator’s governing equations.

In this work we present a memristor emulator that allows implementation in a purely digital environment. The emulator is based on a flux-charge description of the memristor, as proposed in the literature. It has been implemented in a commercial FPGA, and it has been shown that its behaviour mimics that of a circuit using memristors. Specifically, we show that it reproduces the fingerprints of a memristor, both in frequency and memory capability. In addition, we also reproduce an IMPLY gate, showing that the behaviour is correctly reproduced.

Stochastic Logic provides with a methodology that allows the execution of analog operations by means of digital logic. In this work we calculate the expected values and the estimated error for number representation in stochastic logic operations. From these two quantities, we calculate the effective number of bits, which represents the effective resolution of the number in stochastic logic operations. Finally, a random number generator (RNG), fundamental block for number representation in stochastic logic and of stochastic logic operations, capable of reducing the representation error is presented and evaluated.