A novel design of a hybrid Full Adder (FA) using Pass Transistors (PTs), Transmission Gates (TGs) and Conventional Complementary Metal Oxide Semiconductor (CCMOS) logic is presented. Performance analysis of the circuit has been conducted using Cadence toolset. For comparative analysis, the performance parameters have been compared with twenty existing FA circuits. The proposed FA has also been extended up to a word length of 64 bits in order to test its scalability. Only the proposed FA and five of the existing designs have the ability to operate without utilizing buffer in intermediate stages while extended to 64 bits. According to simulation results, the proposed design demonstrates notable performance in power consumption and delay which accounted for low power delay product. Based on the simulation results, it can be stated that the proposed hybrid FA circuit is an attractive alternative in the data path design of modern high-speed Central Processing Units.

Mixed organic–inorganic halide perovskite solar cells (PSCs) are a promising technology with increasing power conversion efficiency (PCE), low-cost material constituents, simple scalability, and a low-temperature solution fabrication process. Recent developments have seen energy conversion efficiencies increase from 3.8% to over 20%. However, to further improve PCE and reach the target efficiency of over 30%, light absorption through plasmonic nanostructures is a promising approach. In this work, we present a thorough quantitative analysis of the absorption spectrum of a methylammonium lead iodide (CH₃NH₃PbI₃) perovskite solar cell using a nanoparticle (NP) array. Our multiphysics simulations using finite element methods (FEM) show that an array of Au nanospheres can increase average absorption >45%, compared to only 27.08% for the baseline structure without any NPs. Furthermore, we investigate the combined effect of engineered enhanced absorption on electrical and optical solar cell performance parameters using the one-dimensional solar cell capacitance software (SCAPS 1-D), which shows a PCE of ∼30.4%, significantly higher than the PCE of ∼21% for cells without NPs. Our findings demonstrate the potential of plasmonic perovskite research for next-generation optoelectronic technologies.

We report a comparative analysis of the performance of negative capacitance field-effect transistors (NCFETs) with single gate, double gate, tri-gate (FinFET) and gate-all-around (GAA) device architectures, using TCAD simulations. Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structure is chosen for all NCFET devices. The NC behavior is attributed to the ferroelectric (FE) layer introduced into the gate stack of these devices. With aluminum doped hafnium oxide as the FE, electrical characteristics of NCFETs, with 40 nm or equivalent gate length, were simulated by solving a combination of Landau-Khalatnikov (LK) equation and metal oxide semiconductor field-effect transistor (MOSFET) equations. At a drain voltage, V _D = 50 mV, NC-FinFET and NC-GAAFET achieve 45% and 67.5% reduction in sub-threshold swing ( SS ), respectively, compared to baseline devices, without any NC effect. In addition to improving sub-threshold performance, NCFETs have also shown higher I _ON / I _OFF ratio than baseline devices for all device architectures. By tuning the thickness of the FE material, we have demonstrated capacitance matching, between FE and MOS capacitances, for non-hysteretic operation in NC-FinFET and NC-GAAFET. Matching FE and MOS capacitances allow for maximum NC effect. Results obtained from our TCAD simulations are consistent with reported experimental data and could provide useful insights into the design, operation and performance improvement of next generation NCFET devices.