Dal Ahn

Prof. Dr. Dal Ahn

Department of Electrical Engineering, Soonchunhyang University, Sinchang-myeon, Asan-si, Suncheonhyang-ro 22, Korea
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Research Focus & Metrics

Academic Career Length

22Years (2005-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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14 May 2023 in Electronics
Verified
Journal Article
Open access
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WLWon Jun Lee
Won Jun Lee
WYWonSang Yoon
WonSang Yoon
DADal Ahn
Dal Ahn
SHSang-Min Han
Sang-Min Han
In this paper, a compact antenna design method is proposed for microstrip patch antennas using a double-layered defected ground structure (DGS) configuration. While a conventional single-layered defected ground structure yields a lower resonant frequency and Q-factor, a smaller circuit size can be achieved using an additional substrate with a higher dielectric constant. The size reduction obtained from the additional resonant LC elements is analytically explained using the equivalent circuit model. The characteristics of the additional substrates are investigated for various dielectric constants and thicknesses. From the experimental results, the proposed design method leads to a total size reduction of up to 51.7% and a miniaturized design for planar antennas with ground apertures. The proposed design method can be applied to various antenna designs with any DGS pattern. Furthermore, the size reduction method can maintain the structure of the resonant patch element and its radiation characteristics. Therefore, the proposed method is applicable to the design of microwave devices on microstrip-based configurations.

14 February 2005 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
Closed access
YCYounkyu Chung
Younkyu Chung
JJJinseong Jeong
Jinseong Jeong
YWyaru wang
yaru wang
DADal Ahn
Dal Ahn
TIT. Itoh
T. Itoh
The design and analysis of a dual-operating mode laterally diffused metal-oxide semiconductor (LDMOS) power amplifier for code-division multiple-access wireless communication base-station applications is presented in this paper. The amplifier structure consists of four parallelly located single-stage LDMOS amplifier array, the dual-mode input power divider, and output power combiner. In this dual-mode operation, the number of operating power amplifier (either one or four amplifiers) is controlled depending on the required power level. This results in significant improvement in efficiency performance of the amplifier by minimizing unnecessary dc power consumption. In addition to the enhancement of efficiency, the amplifier design approach also provides better overall linearity performance. The proposed dual-operating mode design technique was successfully demonstrated by designing, implementing, and testing an LDMOS power amplifier with Motorola MRF 21030 in this study

1 January 2010 in Progress In Electromagnetics Research
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Journal Article
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JLJongsik Lim
Jongsik Lim
JLJun Lee
Jun Lee
JLJaehoon Lee
Jaehoon Lee
SHSang-Min Han
Sang-Min Han
DADal Ahn
Dal Ahn
YJYongchae Jeong
Yongchae Jeong

1 May 2021 in Applied Sciences
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Journal Article
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Maaz SalmanMaaz Salman
Maaz Salman
YJYouna Jang
Youna Jang
JLJongsik Lim
Jongsik Lim
DADal Ahn
Dal Ahn
SHSang-Min Han
Sang-Min Han
A modified Wilkinson Power Divider is proposed in this paper that utilizes defected ground structure (DGS) in parallel with an isolation resistor. The proposed DGS section is incorporated between the output ports, and the isolation resistor is soldered in parallel with the DGS in the ground plane, instead of on the top plane as in a conventional Wilkinson power divider, to achieve improved or preferable isolation. The proposed design is comprised of two pairs of microstrip transmission lines with equal impedances and varied electrical lengths. The parameters of the main circuit and the DGS section are acquired separately. The parameters of the proposed main circuit are derived by applying conjugate matching theory. Dumbbell-shaped DGS is introduced in the ground plane between the output ports, which acts as a parallel resonator, yielding an attenuation pole at the resonant frequency that contributes to improved isolation. By applying the previous well-known circuit theory, the lumped elements of the equivalent circuit of the DGS were achieved. The physical dimensions of the equivalent circuit for the DGS section were obtained by three-dimensional EM simulation. The measured results show improved isolation, return loss and better bandwidth as compared with other similar works. Furthermore, the proposed circuits designed at resonating frequencies of 3 and 2 GHz presented comparatively good return losses, S11 of about −25.54 and −31.24 dB, respectively, and achieved improved isolations, S32 between the output ports, in an order of about −40.83 and −36.05 dB, respectively, which is rather exceptional and desirable.

1 January 2006
Verified
Conference Paper
Closed access
YJYongchae Jeong
Yongchae Jeong
DADal Ahn
Dal Ahn
CKChul-Dong Kim
Chul-Dong Kim
ICIk-Soo Chang
Ik-Soo Chang
In this paper, a new signal canceller that can matches an out-of-phase and a group delay of two path signals simultaneously is proposed. The simultaneous matching of the out-of-phase and the group delay time between two paths can makes a broadband signal cancellation possible. A feedforward linearizing power amplifier that adopts the proposed signal cancellers is fabricated on IMT-2000 base-station transmitting band. The main signal cancellation (or the 1st) loop of the fabricated feedforward amplifier cancel input signal more than 26.3dB and the intermodulation distortion (IMD) signal cancellation (or the 2nd) loop cancel IMD signal more than 15.2dB for 200MHz bandwidth. With the two-tone signals amplification process, the C/I ratio of the amplifier is improved 20.8dB, where the two tones are 2115MHz and 2165MHz, respectively

28 December 2018 in Microwave and Optical Technology Letters
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Journal Article
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SHSang-Min Han
Sang-Min Han
JKJung Ouk Kim
Jung Ouk Kim
WYWon‐Sang Yoon
Won‐Sang Yoon
JLJongsik Lim
Jongsik Lim
DADal Ahn
Dal Ahn