Electrolytic capacitor with a DC-side inductor is a typical DC-link filtering configuration in grid-connected diode rectified Adjustable Speed Drives. The criteria to size the DC-link filter are mainly from the aspects of stability and power quality. Nevertheless, the reliability of the DC-link filter is also an essential performance factor to be considered, which depends on both the component inherent capability and the operational conditions in the field operation. Nowadays, unbalanced voltage brings more electrical-thermal stress to the component, affecting the reliability of the capacitors. In order to study the reliability performance of the LC filter in an ASD system quantitatively, this paper proposes a mission profile based reliability evaluation method for capacitors, considering the nonlinear process of ESR growth and capacitance reduction during the degradation. Based on the proposed lifetime estimation procedure, four case studies are investigated: 1) Lifetime benchmarking of capacitors in LC filtering and slim capacitor filtering configurations; 2) Scalability analysis for the lifetime of capacitors in terms of system power rating and grid-unbalanced levels; 3) Lifetime estimation of capacitors in DC-link filter with long-term mission profile, and 4) The impact of the capacitor sizing on the lifetime of DC-link capacitor under grid-balanced and grid unbalanced conditions.
31 May 2019 in IEEE Transactions on Power Electronics
Capacitive DC links are widely used in Voltage Source Converters (VSC) for power balance, voltage ripple limitation, and short-term energy storage. Various passive and active capacitive DC-link solutions have been proposed intending to improve the reliability of the DC links qualitatively, making great effort to diverting the instantaneous pulsating power into extra reliable storage components. In this publication, a generic topology derivation method for single-phase power converters with active capacitive DC link integrated has been proposed, which can derive all existing topologies, and identify a few new topologies. According to the synthesis results, the main achievements in research on capacitive DC-link solutions are reviewed and presented chronologically as well as thematically ordered. Furthermore, the reliability-oriented design procedure is applied to size the chip area of active switching devices and the passive components to fulfill a specific lifetime target and system specification, as well as compare the overall capacitive energy storage, energy buffer ratio, and the cost of different solutions. The cost comparisons are performed with a scalable lifetime target and power rating. It reveals that different conclusions can be drawn with different lifetime targets in terms of cost-effectiveness.
16 April 2020 in IEEE Transactions on Intelligent Transportation Systems
In both normal and fast wireless electric vehicle charging systems, constant current/constant voltage (CC/CV) charging profile, regardless of the variation of the battery state of charge, is one of the most essential characteristics to ensure the battery performance and reliability. The input zero phase angle (ZPA) is able to minimize the system volt-ampere rating, enhance the power transfer capability, and make it easy to achieve soft-switching operation over the full range of battery charging profile. Therefore, the load-independent CC and CV output characteristics with ZPA conditions are necessary for wireless charging systems. However, the existing methods that can achieve these functions either add power switches or need a large number of compensation components, which make the system inefficient, uneconomical, and bulky. In this paper, a unified resonant tuning configuration with minimum passive component counts is proposed to achieve CC and CV outputs at two ZPA operating frequencies. According to the proposed configuration, all the possible inductive power transfer (IPT) and capacitive power transfer (CPT) topologies are analogized. With these topologies, both CC and CV outputs with ZPA are achieved using a minimum number of compensation components and no additional power switches. Among all the simplest IPT topologies, a primary Series-secondary Series and Parallel (S-SP) compensation topology is illustrated to demonstrate the analysis.
13 February 2017 in IEEE Transactions on Power Electronics
This letter proposes a concept of two-terminal active capacitor implemented by power semiconductor switches and passive elements. The active capacitor has the same level of convenience as a passive one with two power terminals only. It is application independent and can be specified by rated voltage, ripple current, equivalent series resistance, and operational frequency range. The concept, control method, self-power scheme, and impedance characteristics of the active capacitor are presented. A case study of the proposed active capacitor for a capacitive DC-link application is discussed. The results reveal a significantly lower overall energy storage of passive elements and a reduced cost to fulfill a specific reliability target, compared to a passive capacitor solution. Proof-of-concept experimental results are given to verify the functionality of the proposed capacitor.
5 February 2020 in IEEE Transactions on Power Electronics
For the applications where a single capacitor is incapable to meet the needs, multiple capacitors are connected in series or in parallel as a bank to fulfill the capacitance and voltage rating requirements. Even though some commercial products have already existed in the market, most of the design use the same capacitors or combine different types of capacitors by experience, so that the volume, cost, reliability and power loss are not optimized. To the best knowledge, no quantitative design considering all these design aspects is available for capacitor banks. This paper proposes a model-based optimal design method for hybrid capacitor banks consisting of both electrolytic capacitors and film capacitors. Performance factors, such as impedance characteristics, lifetime, power loss, cost, and volume, are modeled and considered in the optimization process. The selection of the capacitance ratio between the two types of capacitors and the number of capacitors connected in parallel are analyzed based on specific design constraints. A case study of the DC-link capacitor bank design for a 5.5 kW inverter is presented to demonstrate the modeling and optimal design process.
14 February 2020 in IEEE Transactions on Transportation Electrification
The reliability of DC-link capacitors in urban rail transit is considered as a major challenge because of significant maintenance impact. In this paper, the DC-link capacitor reliability is researched in metro traction drive system. In the small timescale of control level, the current harmonics of multiple operating conditions and different control methods in the DClink capacitor are discussed. The power loss is simulated by the capacitor harmonics of current and equivalent series resistance (ESR) in multi-operating conditions. Considering electro-thermal coupling, the time-ordered and continuity of thermal stress are analyzed to evaluate the hot spot temperature dynamic conformed to the reality. Combining with the analysis of electrical stress and thermal stress, a multi-timescale capacitor reliability evaluation method is proposed. It is divided into four steps: the discrete small timescale, the single route timescale, the daily operation timescale and the whole lifetime cycle. In the different timescales, the lifetime distribution changes with the dynamics of the complex mission profiles, so as to estimate the lifetime bottleneck of the DC-link capacitor banks with different control methods by the Weibull distribution. In addition, experimental validation is provided to verify the accuracy of the proposed method.