This paper presents reconfigurable RF integrated circuits (ICs) for a compact implementation of an intelligent RF front-end for multiband and multistandard applications. Reconfigurability has been addressed at each level starting from the basic elements to the RF blocks and the overall front-end architecture. An active resistor tunable from 400 to 1600 /spl Omega/ up to 10 GHz has been designed and an equivalent model has been extracted. A fully tunable active inductor using a tunable feedback resistor has been proposed that provides inductances between 0.1-15 nH with Q>50 in the C-band. To demonstrate reconfigurability at the block level, voltage-controlled oscillators with very wide tuning ranges have been implemented in the C-band using the proposed active inductor, as well as using a switched-spiral resonator with capacitive tuning. The ICs have been implemented using 0.18-/spl mu/m Si-CMOS and 0.18-/spl mu/m SiGe-BiCMOS technologies.

This paper focuses on the topic of joint communication and radar sensing (JCRS) and its applications in the scope of upcoming sixth-generation (6G) technology. While the fifth-generation applications have reached the consumer market in the last few years, JCRS has been identified as one of the key technologies for next generation networks. The role of JCRS will vary, ranging from tasks such as radar coordination, context awareness for communication, enhanced security, increased availability, and improving the resilience and trustworthiness of future networks. In this work, the niche of JCRS technology in the future 6G ecosystem, as well as several potential applications, are discussed with a focus on RF hardware. The use of centimeter (cmWave) and millimeter (mmWave) frequency spectrums in the context of JCRS system implementation have been further elaborated. After presenting the near-term application scenarios, the circuit implementation perspectives are investigated in terms of radio frequency (RF) front-end architectures, antenna implementation, and phased arrays. Different communication and radar antenna options are compared, and the best candidates are identified. The packaging options are also presented. From circuit and system perspectives, link budget and self-interference cancellation (SIC) are highlighted. Furthermore, future directions including the next steps on the path to enabling JCRS technology are presented throughout this article. Prior works focused more on physical layers and network capabilities of JCRS systems, with less focus on hardware possibilities; to fill this gap, this article aims to contribute to this exciting research topic with a holistic review of RF hardware, highlighting the diversity of applications and the available technologies to tackle the near- and long-term needs of consumer applications.

Current wireless networks prioritize spectral efficiency, however, energy efficiency has become crucial due to environmental, monetary, and device design considerations. The recently proposed Gearbox physical layer (PHY) approach dynamically switches between modulation schemes including corresponding transceiver front ends to optimize energy efficiency considering spectral availability and required data rates. The contribution of this work is the prediction of the energy-saving potential of a Gearbox-PHY with flexible front ends for linear amplitude modulation considering the power consumption of the analog front end, variable bandwidth usage, and transmission with sleep phases. Our results indicate that a Gearbox-PHY promises significant energy savings.

Joint Communication and radio Sensing (JC&S) has gained significant attention over the past few years. The advantages of this technology include reduced cost, size and power consumption. With further advancements in JC&S systems, it can potentially be used in next-generation cellular networks, internet-of-things and upcoming applications such as Industry 4.0, where a single system is capable of performing a wide variety of functions or tasks. The inclusion of this technology will result in improved performance and safety of the systems. Even though communication and radio sensing make use of a similar Radio Frequency (RF) front-end, the specifications for both these technologies mainly differ in terms of bandwidth and linearity. In this survey, a detailed study of the specifications of radar and communication systems was conducted. For the RF front-end to operate efficiently in both radar and communication modes, there must be reconfigurability in terms of frequency, bandwidth, gain and linearity. In this survey, we investigated different frequency, bandwidth, gain and linearity reconfigurable low noise amplifier (LNA) and down-conversion mixer architectures. The merits and demerits of each architecture are discussed and a summary of the performance of the reconfigurable LNAs and down-conversion mixers in the literature is presented. Finally, possible topologies for JC&S are deduced based on their performance.

The upcoming generation of wireless systems is expected to integrate both communication and sensing capabilities by flexibly allocating resources, including hardware. Phased array antenna (PAA) systems are already vital in communication systems and radars and, therefore, have been intensively studied for several decades. Considering the availability of multiple review assessments for PAA implementation and signal processing, this article fills an existing gap by evaluating the hardware challenges and possibilities for sharing a PAA towards deployable integrated sensing and communication (ISAC) applications. Both types of applications impose tight and often divergent antenna-performance requirements, such as control over beam shape, scanning resolution, and side lobe tolerance. The inherent performance trade-offs, such as pencil beam for refined sensing versus broader beam for instantaneous coverage, highlight the complex design priorities that must be tailored to the application to achieve optimal joint system performance. This paper evaluates state-of-the-art antenna array structures and beamforming techniques in the context of ISAC systems. Although less popular due to their inherent limitations, passive beamforming networks are particularly highlighted for several proposed solutions, e.g., reciprocity and multibeam concept, and elaborated through a design and measurement by the authors. This article addresses the theoretical challenges that emerge while realizing a phased array out of a single element, their impact on sensing and communication performances, and finally, a summary of their mitigation techniques from the state-of-the-art. Selected simulation and measurement results from the authors support the discussions. The paper presents a set of PAA performance matrices for the ISAC system and their related joint benefits or trade-offs. The key enablers towards PAA sharing for ISAC systems, including quasi-circulator, gain-boosting lens, and electromagnetic bandgap structures, are presented, highlighting contemporary technological developments and related theoretical aspects. With the in-depth review, the authors also demonstrate proof of concept for the selected technologies through design steps, simulations, and measurements.

In this work, a voltage-controlled oscillator (VCO) in the $K$ -band has been introduced that uses the proposed technique named “inductive source degeneration of the tail current source.” The contribution of this work is that the auxiliary resonator is placed differently than the conventional works so that it leads to a more compact solution without affecting the phase noise (PN). Based on the simulation results, for the same device sizes and power consumption, the proposed Class-B method reduces the PN by 1.5 dB than the conventional one at 1 MHz offset from 24 GHz center frequency. VCO has been fabricated on a die area of 0.026 mm $^2$ in the 22 nm fully depleted silicon on insulator (FD-SOI) technology. The measurement was done in the free-running mode, and the results show a PN of $-$ 122.4 dBc/Hz at 10 MHz offset from the center frequency of 23.8 GHz. The power consumption of the VCO core is 14.4 mW with 1 V supply voltage. According to the measurement results, this work achieves FoM $_{A}$ , a figure of merit which considers the VCO core area, of $-$ 194.2 dBc/Hz at 10 MHz offset from the center frequency, featuring state-of-the-art among the CMOS VCOs in the $K$ -band.