Prabhat Ranjan Bana

Mr. Prabhat Ranjan Bana

orcid

Research Focus & Metrics

Academic Career Length

9Years (2018-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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20 February 2020 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
KPKaibalya Prasad Panda
Kaibalya Prasad Panda
PBPrabhat Ranjan Bana
Prabhat Ranjan Bana
Gayadhar PandaGayadhar Panda
Gayadhar Panda
Multilevel inverters (MLIs) with self-balanced switched-capacitors (SC) have received wide recognition for increasing power capacity and power quality of the renewable energy and high-frequency power distribution systems. This brief presents a new SC MLI structure using a reduced number of switches and a single dc source. By suitable charging-discharging patterns, the SCs are self-balanced and high voltage boosting is achieved. Comparative analysis with state-of-art MLIs in terms of the number of components, standing voltage, boosting factor, and cost factor demonstrate the merit of presented topology. Further, experimental results confirm the workability of the proposed MLI under linear, non-linear loading and dynamic test conditions using both the 50 Hz and 2.5 kHz modulation.

12 November 2019 in IEEE Transactions on Industrial Informatics
Verified
Journal Article
Closed access
PBPrabhat Ranjan Bana
Prabhat Ranjan Bana
KPKaibalya Prasad Panda
Kaibalya Prasad Panda
Gayadhar PandaGayadhar Panda
Gayadhar Panda

19 March 2020 in IEEE Transactions on Industry Applications
Verified
Journal Article
Closed access
KPKaibalya Prasad Panda
Kaibalya Prasad Panda
PBPrabhat Ranjan Bana
Prabhat Ranjan Bana
Gayadhar PandaGayadhar Panda
Gayadhar Panda
Symmetrical and asymmetrical multilevel inverters (MLIs) have demonstrated its usefulness in a wide range of applications. This is accomplished due to the ongoing improvement by reducing the converter size and enhancement in the voltage quality. In this paper, a generalized cascaded MLI structure is developed that can operate in both symmetric and asymmetric modes. Comparative assessment in terms of the number of components and voltage stress warrants the design superiority. A new selective harmonic elimination (SHE) control using flower pollination algorithm (FPA) is investigated for the developed asymmetrical MLI. The salient features of the FPA such as less burdensome compilation and ability to single-stage local and global search, ascertain the elimination of the targeted harmonics through optimum angles computation. Moreover, the competence of the FPA is verified by comparing it with well-known SHE algorithms. Simulation analysis is carried out in MATLAB/Simulink environment, which validates the workability of the developed system. Experimental tests using fundamental and high switching frequency control techniques are further conducted under dynamic environment to demonstrate the efficacy of the proposed methodology.

20 August 2020 in IEEE Transactions on Circuits and Systems II: Express Briefs
Verified
Journal Article
Closed access
KPKaibalya Prasad Panda
Kaibalya Prasad Panda
PBPrabhat Ranjan Bana
Prabhat Ranjan Bana
Gayadhar PandaGayadhar Panda
Gayadhar Panda
Multilevel inverter (MLI) with switched-capacitor combinations have attained lots of attention for reducing the switch count, source count and control complexity. This brief discloses a cross-switched hybrid 13-level inverter (CHI) topology consisting of switched-capacitor circuits. The proposed CHI includes a single-dc source and only 12 switches to generate the 13-level triple voltage boost output. The desired output voltage levels are realized by self-balanced operation of the capacitors. The voltage across two capacitors is inherently maintained at input dc voltage (Vin) and other two capacitors are self-charged to 0.5Vin, which reduces the control complexity. Comparative assessment with prior-art MLIs indicates the merits such as fewer devices and low voltage stress of proposed CHI. To ascertain the operational principles simulation and experimental results are finally acquired under several steady and dynamic conditions.

23 March 2021 in IEEE Transactions on Industry Applications
Verified
Journal Article
Open access
KPKaibalya Prasad Panda
Kaibalya Prasad Panda
PBPrabhat Ranjan Bana
Prabhat Ranjan Bana
OKOleh Kiselychnyk
Oleh Kiselychnyk
Jihong WangJihong Wang
Jihong Wang
Gayadhar PandaGayadhar Panda
Gayadhar Panda
Switched-capacitor based multilevel inverters (SC MLIs) have received a great deal of interest that reduces the dc source requirement and improves the power quality. However, multiple dc sources and requirement of a large number of switches to generate a high-quality boost output are the fundamental issues in the SC MLIs. This paper presents a step-up 17-level SC MLI using reduced number of switches, three capacitors and a single dc source. The steady-state voltage across the capacitors is maintained in the ratio 1:2:0.5 that contributes to quadruple boosting ability without using any auxiliary capacitor voltage balancing circuit. Besides, lower switch count in the conduction path and operation of 50 % of the switches at fundamental frequency ensures total power loss reduction in the proposed circuit. A comparative assessment with recently developed 17-level MLIs in terms of the number of components, gain, stress and cost factor elucidates the advantages of the proposed MLI. After a detailed circuit analysis and loss evaluation, simulations are performed to verify the step-up and inherent balancing features of the proposed MLI. Further, using both the fundamental frequency and high-frequency switching techniques, extensive experimental test results are presented under different transient conditions to validate the operational feasibility of the 17-level prototype.

13 April 2020 in IEEE Access
Verified
Journal Article
Open access
PBPrabhat Ranjan Bana
Prabhat Ranjan Bana
KPKaibalya Prasad Panda
Kaibalya Prasad Panda
Sanjeevikumar PadmanabanSanjeevikumar Padmanaban
Sanjeevikumar Padmanaban
LMLucian Mihet-Popa
Lucian Mihet-Popa
GPGayadhar Panda
Gayadhar Panda
JWJianzhong Wu
Jianzhong Wu
Multilevel inverters (MLIs) have drawn a tremendous attention in power sector. Application of MLI has grown extensively to improve the power quality and efficiency of the photovoltaic (PV) system. For an MLI interfacing PV system, the size, cost and voltage stress are the key constraints of the MLI that need to be minimized. This paper presents a novel reduced part count MLI interfacing single-stage grid-tied PV system along with a closed-loop control strategy. The proposed MLI consists of n repeating units and a level boosting circuit (LBC) that assists to generate 4n+7 voltage levels instead of 2n+3 levels. Three different algorithms are proposed for suitable selection of dc-link voltages to further enhance the levels. Comparative analysis is carried out to confirm the superiority of developed MLI. The workability of the proposed MLI is investigated with a 1.3 kW PV system. The closed-loop control strategy ensures the maximum power tracking, dc-link voltage balancing, satisfactory operation of the MLI and injection of clean sinusoidal grid current under any dynamic changes. Comprehensive simulation analysis is carried out considering a 15-level MLI structure. The practicality of the topological advancement for PV system is further confirmed by experimental tests under different dynamic conditions.