Superconducting fault current limiters (SFCLs) have significant advantages compared with conventional methods of fault current limiting and therefore have been applied to transmission and distribution systems in recent decades. Besides limiting fault currents, SFCLs can also be used to reduce induction motor starting currents. The major purposes for reducing motor starting currents are to alleviate power system voltage sags and to decrease motor winding heating. Traditionally, induction motor starting currents are decreased by applying reduced voltages using autotransformers, wye-delta starters, or series reactors. However, to ensure motor performance in steady-state operation, a step-by-step control scheme needs to be carefully implemented to disconnect the auxiliary devices from the circuit once the startup transient dies out. These approaches are not useful for reducing inrush currents when the circuit is reenergized upon reclosing after clearing a fault on a neighboring feeder. In this paper, we propose a scheme to reduce induction motor starting currents using SFCL, which has a less complex structure and provides more implementation flexibility than traditional methods. A detailed simulation model of the system with a power source, SFCL, induction motor, and a load is established in MATLAB-Simulink. The results demonstrate the validity and effectiveness of the proposed scheme.

The growth of renewable energy generation in the power grid brings attention to high-voltage direct current (HVDC) transmission as a valuable solution for stabilizing the system. Robust hybrid power system state estimation could enhance the resilience of the control of these systems. This paper proposes a two-stage, highly robust least-trimmed squares (LTS)-based estimator. The first step combines the supervisory control and data acquisition (SCADA) measurements using the robust LTS-based estimator. The second step merges the obtained state results with the available phasor measurement units (PMUs) measurements using a robust Huber M-estimator. The proposed robust LTS-based estimator shows good performance in the presence of Gaussian measurement noise. The proposed estimator is shown to resist and correct the effect of false data injection (FDI) attacks and random errors on the measurement vector and the Jacobian matrix. The state estimation (SE) is executed on a modified version of the CIGRE bipole LCC-HVDC benchmark model integrated into the IEEE 12-bus AC dynamic test system. The obtained simulation results confirm the effectiveness and robustness of the proposed two-stage LTS-based SE.