This letter presents a broadband self-driving radio frequency-to-direct current (RF-dc) rectifier design realized on the CG2H40010F Cree's GaN device. First, the transistor modeling parameters for the reverse-biased I-V characteristics have been obtained to achieve the high-frequency rectification at negative drain biasing. Besides, an enhanced self-synchronization is achieved across the operating bandwidth through an additional microstrip open-stub line at the gate input matching network. Thus, an additional line maintains a fixed 180° phase offset between drain and gate voltages. Finally, the rectifier efficiency of >60% has been measured from 2.65 to 2.95 GHz for 10-W RF input power. The designed rectifier has been outperformed the recent designs in terms of operational bandwidth (300 MHz) and rectification efficiency.

An RF–DC rectifier is an important part in a wireless power transfer system. Diode-based rectifiers are widely used in low-power harvesting scenarios, and for high power, a transistor based on the time-reversal duality was proposed. This paper presents a high-efficiency self-synchronous RF–DC rectifier based on a waveform-guided design method and an improved rectification model of a commercial GaN device. The main contributions of this paper are that (1) an improved transistor model with correct reverse bias is built for accurate rectifier simulation, and (2) a new design method of self-synchronous RF–DC rectifier is proposed: as soon as the operating mode of the rectifier, input power, and DC load are set, matching and coupling network can be calculated directly based on waveform-guided method, thus design and adjustment process of a conventional power amplifier (PA) due to the duality between a PA and a rectifier would no longer be required. A 5.8 GHz self-synchronous RF–DC rectifier is designed for validation, and the optimum RF–DC conversion efficiency is 68% with 12 W input power as well as 19.9 V output DC potential with 50 Ω load resistance. The proposed rectifier is suitable for high input power rectification applications of wireless power transfer.

This paper presents an advanced radio frequency (RF)–direct current (DC) power conversion architecture based on a multistage Cockcroft–Walton topology. The proposed design achieves an enhanced voltage conversion ratio while maintaining superior RF-DC conversion efficiency under low input power conditions. To address the inherent limitations of cascading Cockcroft–Walton topologies with class-F load networks, a novel ground plane isolation technique was developed, which utilizes the reverse-side metallization of the circuit board. A 5.8 GHz two-stage Cockcroft–Walton voltage multiplier rectifier was fabricated and characterized. Measurement results demonstrate that the circuit achieves a maximum output voltage of 7.4 V and a peak conversion efficiency of 70.5% with an input power of only 30 mW, while maintaining stable performance across varying load conditions. A comparison with a two-stage Dickson rectifier reveals that the Cockcroft–Walton rectifier exhibits superior output voltage and conversion efficiency. The proposed architecture delivers significant improvements in power conversion efficiency and voltage multiplication capability compared to conventional designs, establishing a new benchmark for low-power wireless energy harvesting applications.