Yan Liu

Dr. Yan Liu

School of Mechano-Electronic Engineering, Xidian University, Xi’an 710071, China
orcid

Research Focus & Metrics

Academic Career Length

21Years (2006-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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22 February 2018 in Sensors
Verified
Journal Article
Open access
PDF file
YLYan Liu
Yan Liu
Hai WangHai Wang
Hai Wang
WZWei Zhao
Wei Zhao
Min ZhangMin Zhang
Min Zhang
HQHongbo Qin
Hongbo Qin
YXYongqiang Xie
Yongqiang Xie
Wearable health monitoring systems have gained considerable interest in recent years owing to their tremendous promise for personal portable health watching and remote medical practices. The sensors with excellent flexibility and stretchability are crucial components that can provide health monitoring systems with the capability of continuously tracking physiological signals of human body without conspicuous uncomfortableness and invasiveness. The signals acquired by these sensors, such as body motion, heart rate, breath, skin temperature and metabolism parameter, are closely associated with personal health conditions. This review attempts to summarize the recent progress in flexible and stretchable sensors, concerning the detected health indicators, sensing mechanisms, functional materials, fabrication strategies, basic and desired features. The potential challenges and future perspectives of wearable health monitoring system are also briefly discussed.

6 March 2019 in Electronics
Verified
Journal Article
Open access
PDF file
Min ZhangMin Zhang
Min Zhang
LLLinpeng Li
Linpeng Li
Hai WangHai Wang
Hai Wang
YLYan Liu
Yan Liu
HQHongbo Qin
Hongbo Qin
WZWei Zhao
Wei Zhao
Field programmable gate array (FPGA) is widely considered as a promising platform for convolutional neural network (CNN) acceleration. However, the large numbers of parameters of CNNs cause heavy computing and memory burdens for FPGA-based CNN implementation. To solve this problem, this paper proposes an optimized compression strategy, and realizes an accelerator based on FPGA for CNNs. Firstly, a reversed-pruning strategy is proposed which reduces the number of parameters of AlexNet by a factor of 13× without accuracy loss on the ImageNet dataset. Peak-pruning is further introduced to achieve better compressibility. Moreover, quantization gives another 4× with negligible loss of accuracy. Secondly, an efficient storage technique, which aims for the reduction of the whole overhead cache of the convolutional layer and the fully connected layer, is presented respectively. Finally, the effectiveness of the proposed strategy is verified by an accelerator implemented on a Xilinx ZCU104 evaluation board. By improving existing pruning techniques and the storage format of sparse data, we significantly reduce the size of AlexNet by 28×, from 243 MB to 8.7 MB. In addition, the overall performance of our accelerator achieves 9.73 fps for the compressed AlexNet. Compared with the central processing unit (CPU) and graphics processing unit (GPU) platforms, our implementation achieves 182.3× and 1.1× improvements in latency and throughput, respectively, on the convolutional (CONV) layers of AlexNet, with an 822.0× and 15.8× improvement for energy efficiency, separately. This novel compression strategy provides a reference for other neural network applications, including CNNs, long short-term memory (LSTM), and recurrent neural networks (RNNs).

23 November 2020 in International Journal of Precision Engineering and Manufacturing-Green Technology
Verified
Journal Article
Closed access
PDF file
YLYan Liu
Yan Liu
SSSiyao Shang
Siyao Shang
SMShuting Mo
Shuting Mo
PWPeng Wang
Peng Wang
HWHai Wang
Hai Wang

12 December 2022 in Applied Physics Letters
Verified
Journal Article
Closed access
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ZGZhi Gong
Zhi Gong
JCJiajia Chen
Jiajia Chen
Yue PengYue Peng
Yue Peng
YLYan Liu
Yan Liu
XYXiao Yu
Xiao Yu
Genquan HanGenquan Han
Genquan Han
HfO2-ZrO2 superlattice (SL) ferroelectric (FE) ultrathin films exhibit significant improvement in endurance performance compared with solid-solution HfxZr1−xO2 (HZO). Despite the experimental evidence, the underlying microscopic mechanisms of the enhanced reliability of SL remain elusive. This Letter explores the mechanism by performing first-principle calculations on SL and HZO systems. The enhanced endurance in the SL can be well explained by higher oxygen vacancy (Vo) migration energy barriers along the FE polarization direction, which slow down the increase in Vo. The suppression of Vo increase will potentially help maintain the stability of the FE phase and alleviate the fatigue. Based on this mechanism, we suggest that doping materials with higher Vo migration barriers can further improve the endurance of HfO2-based FE devices. This work facilitates the future development of HfO2-based FE devices with enhanced endurance and reliability.

24 November 2016 in Sensors
Verified
Journal Article
Open access
PDF file
YLYan Liu
Yan Liu
Hai WangHai Wang
Hai Wang
WZWei Zhao
Wei Zhao
HQHongbo Qin
Hongbo Qin
XFXuan Fang
Xuan Fang
The field of piezoresistive sensors has been undergoing a significant revolution in terms of design methodology, material technology and micromachining process. However, the temperature dependence of sensor characteristics remains a hurdle to cross. This review focuses on the issues in thermal-performance instability of piezoresistive sensors. Based on the operation fundamental, inducements to the instability are investigated in detail and correspondingly available ameliorative methods are presented. Pros and cons of each improvement approach are also summarized. Though several schemes have been proposed and put into reality with favorable achievements, the schemes featuring simple implementation and excellent compatibility with existing techniques are still emergently demanded to construct a piezoresistive sensor with excellent comprehensive performance.

14 April 2017 in Sensors
Verified
Journal Article
Open access
PDF file
Min ZhangMin Zhang
Min Zhang
Hai WangHai Wang
Hai Wang
YLYan Liu
Yan Liu
In this paper, a high-resolution time-to-digital converter (TDC) based on a field programmable gate array (FPGA) device is proposed and tested. During the implementation, a new architecture of TDC is proposed which consists of a measurement matrix with 1024 units. The utilization of routing resources as the delay elements distinguishes the proposed design from other existing designs, which contributes most to the device insensitivity to variations of temperature and voltage. Experimental results suggest that the measurement resolution is 7.4 ps, and the INL (integral nonlinearity) and DNL (differential nonlinearity) are 11.6 ps and 5.5 ps, which indicates that the proposed TDC offers high performance among the available TDCs. Benefitting from the FPGA platform, the proposed TDC has superiorities in easy implementation, low cost, and short development time.