Miaomiao Wei

Dr. Miaomiao Wei

orcid

Research Focus & Metrics

Academic Career Length

9Years (2018-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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23 January 2022 in Sensors
Verified
Journal Article
Open access
PDF file
MWMiaomiao Wei
Miaomiao Wei
AZAihua Zhang
Aihua Zhang
LQLin Qi
Lin Qi
BLBicao Li
Bicao Li
JSJun Sun
Jun Sun
The frequency estimation of complex exponential carrier signals in noise is a critical problem in signal processing. To solve this problem, a new iterative frequency estimator is presented in this paper. By iteratively computing the interpolation of DTFT samples, the proposed algorithm obtains a fine frequency estimate. In addition, its mean square error (MSE) analysis is presented in this paper. By analyzing influences of the selectable parameters on the estimation accuracy of the model, a method for choosing appropriate parameters is discussed, helping to reduce the estimation error of the proposed estimator. Simulation results show that compared with other algorithms with a comparable estimation accuracy, the proposed iterative estimator can obtain a root mean square error (RMSE) that is closer to Cramér–Rao lower bound (CRLB).

28 August 2023 in Sensors
Verified
Journal Article
Open access
PDF file
MWMiaomiao Wei
Miaomiao Wei
YZYongsheng Zhu
Yongsheng Zhu
JSJun Sun
Jun Sun
XLXiangyang Lu
Xiangyang Lu
XMXiaomin Mu
Xiaomin Mu
Juncai XuJuncai Xu
Juncai Xu
This research presents a comprehensive study of the dichotomous search iterative parabolic discrete time Fourier transform (Ds-IpDTFT) estimator, a novel approach for fine frequency estimation in noisy exponential signals. The proposed estimator leverages a dichotomous search process before iterative interpolation estimation, which significantly reduces computational complexity while maintaining high estimation accuracy. An in-depth exploration of the relationship between the optimal parameter p and the unknown parameter δ forms the backbone of the methodology. Through extensive simulations and real-world experiments, the Ds-IpDTFT estimator exhibits superior performance relative to other established estimators, demonstrating robustness in noisy conditions and stability across varying frequencies. This efficient and accurate estimation method is a significant contribution to the field of signal processing and offers promising potential for practical applications.

14 March 2026 in Sensing and Bio-Sensing Research
Verified
Journal Article
Open access
MWMiaomiao Wei
Miaomiao Wei
SKSolventa Krakauskaite
Solventa Krakauskaite
RMRyan Mercer
Ryan Mercer
JLJiaguo Lin
Jiaguo Lin
LBLaimonas Bartusis
Laimonas Bartusis
FSFabien Scalzo
Fabien Scalzo

1 December 2018
Verified
Conference Paper
Closed access
MWMiaomiao Wei
Miaomiao Wei
ZLZhoufeng Liu
Zhoufeng Liu
CLChunlei Li
Chunlei Li
RYRuimin Yang
Ruimin Yang
BLBicao Li
Bicao Li
QXQingwei Xu
Qingwei Xu
Based on the principle of the quasi-optimal satellite selection algorithm and the fast satellite selection algorithm, this paper gives a combined satellite selection algorithm. The algorithm introduces a new satellite selection strategy by considering different distributions of the similar satellite group. The computation amount of the combined algorithm is lower than quasi-optimal satellite selection algorithm. The experiment results show this algorithm can get a lower GDOP value than quasi-optimal satellite selection algorithm and close to the minimal GDOP.

1 January 2026 in Electronics Letters
Verified
Journal Article
Open access
SYShouhua Yu
Shouhua Yu
SLShigang Liu
Shigang Liu
MWMiaomiao Wei
Miaomiao Wei
HLHui Li
Hui Li
HCHao Cao
Hao Cao
In modern communication systems, signal bandwidth continues to expand, and the signal environment grows increasingly dense. Accurate extraction of narrowband target signals from wide frequency bands has thus become a key requirement in digital signal processing. Traditional serial digital down conversion (DDC) systems face real‐time constraints in high‐speed sampling scenarios. They struggle to adapt to the synchronous processing of multiple signals within wide frequency bands. Based on the Xilinx VU9P Field‐Programmable Gate Array (FPGA), this paper designs and implements a 16‐channel parallel DDC architecture. It adopts parallel mixing and polyphase filtering decimation technology to decompose 5 Gsps high‐speed sampled signals into 16 channels of 312.5 Msps low‐speed sub‐signals. The system can synchronously process 5 MHz narrowband QPSK and 50 MHz wideband QPSK signals under dual carriers of 1 GHz and 1.1 GHz. Simulation and hardware test results indicate that its 16‐channel parallel architecture enables a 5 Gsps processing capability that is infeasible for traditional serial architectures on the same FPGA platform. The output signals exhibit no significant aliasing distortion, with a measured spurious suppression ratio (SSR) of 62 dB, stopband attenuation of no less than 60 dB, and a resource occupancy rate below 15%, showing promising engineering application prospects.