Battery free Internet of Things (BF IoT), which is realized by harvesting ambient energy to power the IoT devices, has many advantages such as low power, low cost, free-maintenance, easy deployment, and environmental protection. As the two key enabling technologies of BF IoT, the integration of energy harvesting, management and backscatter communication (BackCom) is expected to meet practical applications. However, several fundamental issues need to be addressed to fully develop the potential of such integration. In this paper, we propose an ultra-low power energy harvesting and management scheme that effectively reduces the startup and quiescent power consumption. In the case of extremely limited energy harvested, the Long Range (LoRa) BackCom digital waveform generation algorithm with ultra-low power consumption and low complexity is studied, which can support low-power and low-cost micro-controllers (MCUs). Then, a radio frequency (RF) front-end scheme that is compatible with RF energy harvesting (RFEH), BackCom, and On-Off-Keying (OOK) receiving is proposed. On this basis, we design and implement a fully functional BF LoRa Tag, which integrates tag antennas, LoRa BackCom, low-power OOK receiving, multi-parameter real-time sensing, RFEH and management, at a cost of only $6. Our test results show that the BF LoRa Tag can be self-powered by harvesting the RF energy as low as –19 dBm, with the cold-start power as low as 280 nW, the quiescent power as low as 49 nW, the OOK receiving power consumption as low as 1.74 μW, the LoRa BackCom power consumption of only 251 μW, and the communication distance up to 445 meters. Compared with the prototypes in existing literature, the BF LoRa Tag not only has lower power consumption, wider coverage, and the lowest cost, but also has complete system functions. Finally, we discuss the reciprocity between stations and receivers, as well as the BF LoRa cellular communication network, which provides useful references for the practical application and large-scale deployment of BF IoT in the future.

Although chirp spread spectrum (CSS) modulation in the LoRa system offers remarkable receiver sensitivity, its data rate is rather limited. Aiming at data rate enhancement, this letter presents a novel modulation scheme called Dual Chirps Direction Shift Keying (DCDSK). The DCDSK employs dual up-chirp or dual down-chirp superposition transmissions to enhance the data rate and introduces a Discrete Fourier Transform (DFT) spectral kurtosis-based non-coherent demodulation algorithm to lower the bit error rate (BER). Moreover, the theoretical BER performance of DCDSK is analysed. The simulation results validate the superiority of the DCDSK modulation over existing CSS-based modulations in terms of both the data rate and the power efficiency.

This paper investigates a simultaneous wireless information and power transfer (SWIPT) decode-and-forward (DF) relay network, where a source node transmits data to a destination node through the assistance of multi-hop passive relays. We employ the time-switching (TS) protocol, enabling the relays to harvest energy from the received previous hop signal to support data forwarding. We first prove that the system throughput monotonically increases with the transmit power of the source node. Next, by employing logarithmic transformations, we convert the non-convex problem of obtaining optimal TS ratios at each relay to maximize the system throughput into a convex optimization problem. Comprehensively taking into account the convergence rate, computational complexity per iteration, and robustness, we selected the log barrier method—a type of interior point method—to address this convex optimization problem, along with providing a detailed implementation procedure. The simulation results validate the optimality of the proposed method and demonstrate its applicability to practical communication systems. For instance, the proposed scheme achieves 1437.3 bps throughput at 40 dBm maximum source power in a 2-relay network—278.6% higher than that of the scheme with TS ratio fixed at 0.75 (379.68 bps). On the other hand, it converges within a 1.36 ms computation time for 5 relays, 6 orders of magnitude faster than exhaustive search (1730 s).

This paper proposes a 32-bit five-stage pipelined microprocessor based on the RISC-V instruction set architecture to enhance pipeline execution efficiency. An enhanced Harvard architecture utilizing dual-port ROM is employed to facilitate parallel execution of instruction fetch and memory access operations. Additionally, a three-level address selector is designed to minimize pipeline flush processing cycles resulting from prediction failures. Furthermore, a data forward unit is implemented to mitigate the impact of data hazards on the pipeline, and a two-stage pipeline memory access structure is devised to eliminate pipeline stalls caused by memory access operations. The experimental results show that the processor designed in this paper can operate up to 110 MHz with a CoreMark score of 2.98. The CoreMark*Freq. of the proposed processor exceeds that of the Taiga processor by approximately 15%, and surpasses the VexRiscv processor by approximately 7%. The microprocessor presented in this paper features a compact footprint and high performance, making it highly applicable in the field of Internet of Things.

As the popularity of smartphones, wearable devices, intelligent vehicles, and countless other devices continues to rise, the surging demand for mobile data traffic has resulted in an increasingly crowded electromagnetic spectrum. Spectrum sharing serves as a solution to optimize the utilization of wireless communication channels, allowing various types of users to share the same frequency band securely. This paper investigates spectrum allocation and power control problems in overlay spectrum sharing, with a focus on promoting green communication. Maximizing weighted sum energy efficiency (WSEE) requires solving complex multiple-ratio fractional programming (FP) problems. In contrast, weighted sum power (WSP) minimization offers a more straightforward approach. Moreover, because WSP is directly related to users’ power consumption, we can dynamically adjust their weights to balance their residual energy. We prioritize WSP minimization over the more common WSEE maximization. This choice not only simplifies computation but also maintains users’ quality of service (QoS) requirements. The joint optimization for multiple primary users (PUs) and secondary users (SUs) can be decomposed into two components: a weighted bipartite matching problem and a series of convex resource allocation problems. Utilizing Newton’s method, our system-level simulation results show that the proposed scheme achieves optimal performance with minimal computational time. We explore strategies to accelerate the proposed scheme by refining the selection of initial values for Newton’s method.

This letter presents a computationally efficient weighted sum power (WSP) minimization framework for underlaid device-to-device (D2D) networks. Our approach circumvents the high complexity of fractional programming (FP) inherent in energy efficiency (EE) and weighted sum EE (WSEE) maximization. The core innovation lies in decoupling the problem into two tractable components: (i) closed-form geometric optimal power allocation with O(1) time complexity, eliminating iterative computations; (ii) optimal link matching via the Kuhn-Munkres (KM) algorithm. Integrated with an energy-aware heuristic for dynamic weight adaptation, the proposed scheme achieves ∼50% average network lifetime extension compared to FP-based EE maximization while maintaining real-time feasibility.