J. Apolinar Reynoso-Hernández

Dr. J. Apolinar Reynoso-Hernández

orcid

Research Focus & Metrics

Academic Career Length

40Years (1987-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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4 September 2003 in IEEE Microwave and Wireless Components Letters
Verified
Journal Article
Closed access
JRJ. Apolinar Reynoso-Hernández
J. Apolinar Reynoso-Hernández
In this letter, a unified method for computing the complex propagation constant /spl gamma/ of reflecting and nonreflecting lines is presented. The method uses a new matrix representation of the wave cascade matrix of a line having any characteristic impedance. To overcome the sign ambiguity problem inherent to the classical method some parameters of the fictitious X/sub AM/ matrix are used and determined by the method itself. The success of the new procedure to resolve the sign ambiguity problem lies in the new matrix representation of the wave cascade matrix of a line having any characteristic impedance and in the reliable criterion to determine the a/sub m//c/sub m/ and b/sub m/ parameters of the fictitious X/sub AM/ matrix.

15 January 2014 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
Closed access
YKYoungseo Ko
Youngseo Ko
PRPatrick Roblin
Patrick Roblin
ALAndres Zarate-De Landa
Andres Zarate-De Landa
JRJ. Apolinar Reynoso-Hernández
J. Apolinar Reynoso-Hernández
DNDan Nobbe
Dan Nobbe
FMFrancisco Javier Martinez
Francisco Javier Martinez
A measurement-based quasi-static nonlinear field-effect transistor (FET) model relying on an artificial neural network (ANN) approach and using real-time active load-pull (RTALP) measurement data for the model extraction is presented for an SOS-MOSFET. The efficient phase sweeping of the RTALP drastically reduces the number of large-signal measurements needed for the model development and verification while maintaining the same intrinsic voltage coverage as in conventional passive or active load-pull systems. Memory effects associated with the parasitic bipolar junction transistor (BJT) in the SOS-MOSFET are accounted for by using a physical circuit topology together with the simultaneous ANN extraction of: 1) the intrinsic FET current-voltage characteristics; 2) the intrinsic charges of the FET; and 3) the BJT dc characteristics, all from the same modulated large-signal RF data. The verification of the model using load-lines, output power, power efficiency, and load-pull, which is performed using two additional independent RTALP measurements, demonstrates that a reasonably accurate large-signal RF device model accounting for memory effects can be extracted from a single 10.5-ms RTALP measurement with a physically based ANN model.

2 May 2009 in IEEE Microwave Magazine
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Journal Article
Closed access
ALAndres Zarate-De Landa
Andres Zarate-De Landa
JZJose Eleazar Zuniga-Juarez
Jose Eleazar Zuniga-Juarez
JLJose Raul Loo-Yau
Jose Raul Loo-Yau
JRJ. Apolinar Reynoso-Hernández
J. Apolinar Reynoso-Hernández
MMMaria del Carmen Maya-Sanchez
Maria del Carmen Maya-Sanchez
JVJuan Luis del Valle-Padilla
Juan Luis del Valle-Padilla
Heterojunction field effect transistors (HFET) based on gallium nitride (AlGaN/GaN) and metal semiconductor field effect transistors (MESFETs) based on silicon carbide (SiC) are the preferred transistors for high-power amplifier circuit designs rather than MESFETs, high electron mobility transistors (HEMTs) and pseudomorphic HEMTs based on gallium arsenide (GaAs) or indium phosphide (InP) semiconductor technology. While AlGaN/GaN and SiC are good candidates for high-power applications, GaAs and InP semiconductor technologies are the preferred transistors in low-power, low-voltage, and low-noise applications [1].

30 September 2022 in IEEE Transactions on Circuits and Systems I: Regular Papers
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Journal Article
Closed access
ILI. Lavandera-Hernandez
I. Lavandera-Hernandez
JLJose Raul Loo-Yau
Jose Raul Loo-Yau
JRJ. Apolinar Reynoso-Hernández
J. Apolinar Reynoso-Hernández
DOD. Ochoa-Armas
D. Ochoa-Armas
PMP. Moreno
P. Moreno
This work presents a theoretical analysis of the frequency dependence of the load impedance seen from the transistor’s intrinsic current source and the package plane for designing class-J*/B/J power amplifiers (PAs). The presented results are possible thanks to the new analytical expression for calculating the output current. Moreover, the proposed analysis permits the study of the relationship between the maximum output current and the frequency assuming a nonlinear output capacitance; the information allows designers to evaluate the capability of the transistor for designing class-J*/B/J PA at predetermined drain efficiency and frequency. The proposed impedance equations with load-pull data at different frequencies, help to identify a design space that makes the design of output matching networks (OMN) for broadband cases flexible. Experimental data of a designed and fabricated class-J*/B/J GaN PA for 2-3 GHz with drain efficiency and output power higher than 60% and 40 dBm, respectively, validate the theoretical results of the proposed analysis.

31 May 1996 in Solid-State Electronics
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Journal Article
Closed access
MAM Aceves
M Aceves
CFCiro Falcony
Ciro Falcony
JRJ. Apolinar Reynoso-Hernández
J. Apolinar Reynoso-Hernández
WCWilfrido Calleja-Arriaga
Wilfrido Calleja-Arriaga
ATA Torres
A Torres

1 January 1989 in IEEE Transactions on Microwave Theory and Techniques
Verified
Journal Article
Closed access
JRJ. Apolinar Reynoso-Hernández
J. Apolinar Reynoso-Hernández
JGJ. Graffeuil
J. Graffeuil