We have developed an array antenna consisting of 12 elements of simple square-shaped, corner-truncated patches for circularly polarized synthetic aperture radar (CP-SAR) operated in the L-band. The corporate feed design concept is implemented by combining a split-T and a 3-way circular-sector-shape power divider to excite circularly polarized radiation. The fabricated antenna based on the simulation using moment method gives a good circular polarization at the center frequency of 1.27 GHz with an impedance bandwidth of 6.1% and 3-dB axial ratio bandwidth of 1.0%, satisfying the specification for our circularly polarized synthetic aperture radar intended for use onboard an unmanned aerial vehicle and a small satellite.
1 September 2020 in Microprocessors and Microsystems
Signal generation and measurement have been widely used in many engineering applications, such as for creating test signals in radar, communication, and software-defined radio. In field programmable gate array (FPGA) design, to generate and measure an analog signal, compatible software and hardware interfaces are required. Traditionally, hardware description language (HDL) is required to program an FPGA. HDL programming provides an efficient logic resource with low latency. However, it is time-consuming for designs that are more complex. Currently, OpenCL is implemented for FPGA programming. OpenCL reduces the FPGA development time because it increases the abstraction level of the code. OpenCL is an open and royalty-free framework for accelerating the algorithm executed on a heterogeneous system, such as a GPU, CPU, DSP, or FPGA. OpenCL implementation on FPGAs yields high-performance results for the computation process. However, compared to HDL design, OpenCL does not provide a particular function to access the FPGA hardware directly. In this paper, we have demonstrated the implementation of OpenCL programming on an FPGA for signal generation and measurement. We have developed OpenCL components that can interact with the FPGA hardware directly. An OpenCL I/O channel extension is employed in the kernel to read data from and write data to the OpenCL components. The experimental results indicate that OpenCL can be used for signal measurement and generation using FPGAs.
11 January 2022 in Journal of Signal Processing Systems