Piecewise linear approximation of sensor signals is a well-known technique in the fields of Data Mining and Activity Recognition. In this context, several algorithms have been developed, some of them with the purpose to be performed on resource constrained microcontroller architectures of wireless sensor nodes. While microcontrollers are usually constrained in computational power and memory resources, all state-of-the-art piecewise linear approximation techniques either need to buffer sensor data or have an execution time depending on the segment’s length. In the paper at hand, we propose a novel piecewise linear approximation algorithm, with a constant computational complexity as well as a constant memory complexity. Our proposed algorithm’s worst-case execution time is one to three orders of magnitude smaller and its average execution time is three to seventy times smaller compared to the state-of-the-art Piecewise Linear Approximation (PLA) algorithms in our experiments. In our evaluations, we show that our algorithm is time and memory efficient without sacrificing the approximation quality compared to other state-of-the-art piecewise linear approximation techniques, while providing a maximum error guarantee per segment, a small parameter space of only one parameter, and a maximum latency of one sample period plus its worst-case execution time.

WLAN mesh networks are one of the key technologies for upcoming smart city applications and are characterized by a flexible and low-cost deployment. The standard amendment IEEE 802.11s introduces low-level mesh interoperability at the WLAN MAC layer. However, scalability limitations imposed by management traffic overhead, routing delays, medium contention, and interference are common issues in wireless mesh networks and also apply to IEEE 802.11s networks. Possible solutions proposed in the literature recommend a divide-and-conquer scheme that partitions the network into clusters and forms smaller collision and broadcast domains by assigning orthogonal channels. We present CHaChA (Clustering Heuristic and Channel Assignment), a distributed cross-layer approach for cluster formation and channel assignment that directly integrates the default IEEE 802.11s mesh protocol information and operating modes, retaining unrestricted compliance to the WLAN standard. Our concept proposes further mechanisms for dynamic cluster adaptation, including subsequent cluster joining, isolation and fault detection, and node roaming for cluster balancing. The practical performance of CHaChA is demonstrated in a real-world 802.11s testbed. We first investigate clustering reproducibility, duration, and communication overhead in static network scenarios of different sizes. We then validate our concepts for dynamic cluster adaptation, considering topology changes that are likely to occur during long-term network operation and maintenance.

Vendor-independent interoperability is one of the key-enablers for medical devices in future operating rooms, intensive care units, and medical care in general. Using the paradigm of a Service-Oriented Architecture (SOA) is a promising approach realized by the new IEEE 11073 SDC family of standards. Standard compliant communication stacks will be used to build up systems of networked medical devices. The performance of the stack implementation is crucial for the usability in real-world medical environments. Therefore, we investigate the latency of currently available middleware stacks: SoftICE, openSDC, and OSCLib. The aim is to evaluate the suitability of the underlying concepts, understanding the communication behavior using different hard- and software platforms, and finding problems to support future development. For the latency measurements we build up a use-case independent testbed and instrument the libraries to get more information. On the one hand, our investigations substantiate the suitability of the underlying concept and the available middleware stack implementations. On the other hand, unexpected results occurred, like a strong dependency of communication latency on the combination of hardware platform, Java Virtual Machine (JVM), and JVM configuration and even a strong dependency on the intensity of exchanged data when using Java middleware implementations.

The aim of design space exploration (DSE) is to identify implementations with optimal quality characteristics which simultaneously satisfy all imposed design constraints. Hence, besides searching for new solutions, a quality evaluation has to be performed for each design point. This process is typically very expensive and takes a majority of the exploration time. As nearly all the explored design points are sub-optimal, most of them get discarded after evaluation. However, evaluating a solution takes virtually the same amount of time for both good and bad ones. That way, a huge amount of computing power is literally wasted. In this paper, we propose a solution to the aforementioned problem by integrating efficient approximations in the background of a DSE engine in order to allow an initial evaluation of each solution. Only if the approximated quality indicates a promising candidate, the time-consuming exact evaluation is executed. The novelty of our approach is that (1) although the evaluation process is accelerated by using approximations, we do not forfeit the quality of the acquired solutions and (2) the integration in a background theory allows sophisticated reasoning techniques to prune the search space with the help of the approximation results. We have conducted an experimental evaluation of our approach by investigating the dependency of the accuracy of used approximations on the performance gain. Based on 120 electronic system level problem instances, we show that our approach is able to increase the overall exploration coverage by up to six times compared to a conservative DSE whenever accurate approximation functions are available.

WLAN mesh networks are characterized by their flexible and low-cost deployment, scalability, and self-healing capabilities. The new WLAN standard IEEE 802.11s introduces low-level mesh interoperability. However, building large-scale real-world test beds and reproducible setups is challenging and costly. In the majority of research works, network simulation is preferred over practical measurements. Here, the main disadvantage exists in simplified device and protocol models restricting the comparability to practical implementations. In contrast, using device emulation still requires the simulation of wireless channel and environment models. Consequently, a combination of both emulation and simulation is needed to enable virtual prototyping of real applications and protocols in WLAN mesh networks. Nevertheless, the computation of complex wireless channel effects requires a decoupling of wall clock and simulation time. Therefore, we present ViPMesh, a virtual prototyping framework for IEEE 802.11s and its Linux reference implementation. ViPMesh relies on WLAN device emulation and nested virtualization using QEMU and Linux containers to support the analysis of real applications on top of an unmodified protocol stack. Adopting an alternative time source approach for QEMU, ViPMesh acts as discrete-event simulator. It further integrates channel and environment models with support for IEEE 802.11n MIMO techniques, high throughput modes, multi-channel operation, and node mobility. To the best of our knowledge, this is the first approach that combines the IEEE 802.11s reference implementation with the described simulation features. The functionality of ViPMesh is demonstrated in different example scenarios.