Robert Stala

Prof. Robert Stala

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Research Focus & Metrics

Academic Career Length

22Years (2005-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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18 November 2010 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
RSRobert Stala
Robert Stala
This paper presents investigations of dc-link voltages balance with the use of a passive RLC circuit in a single-phase diode-clamped inverter composed of two three-level legs. Application of the balancing circuit in the diode-clamped inverter needs proper PWM generation but the modulation method is the same for both in the balanced and unbalanced state. This method of dc-link voltages balance does not need any measurements or additional control, and this ensures fast response and low energy losses. This paper also presents mathematical analysis of the PWM modulation method and the inverter operation, and an analytical description of the natural balancing process with contribution of the load current and the balancing circuit current. Simulations and experimental results of the inverter with FPGA-based control are presented to confirm the effectiveness of the natural balancing process.

28 August 2009 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
RSRobert Stala
Robert Stala
This paper presents investigations of voltage-sharing stabilization with the use of passive RLC circuit in switch-mode flying capacitor DC-DC converters. Practical and simulation results and also a mathematical analysis of the balancing process in boost and buck-boost converters are presented. Analyzed converters use additional capacitors (flying capacitors), charged to proper value, for decreasing the voltage on switches and increasing the inductor-current frequency. Such advantages are achieved under proper voltage sharing on the flying capacitors. The voltages are stabilized in a natural way by the load current and with the use of external RLC circuit to force the current that flows through the converters' capacitors under unbalance state. This paper focuses on the analysis of the balancing phenomenon with the use of the external RLC circuit in these topologies. The balancing booster improves the balancing process in these converters, making it independent of the load. It can also reduce oscillations that arise in the converters in transient states.

9 July 2018 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
RSRobert Stala
Robert Stala
ZWZbigniew Waradzyn
Zbigniew Waradzyn
APAdam Penczek
Adam Penczek
AMAndrzej Mondzik
Andrzej Mondzik
ASAleksander Skała
Aleksander Skała
This paper presents research results of voltage gain number control methods of a power electronic resonant zero-current switching (ZCS) dc-dc switched-capacitor (SC) voltage multiplier (SCVM) in a topology with fault tolerance capability (FSCVM). The converters operated under the basic switching patterns are constant-voltage-gain dc-dc series-parallel resonant SC converters. However, this paper presents a method for the output voltage regulation by a special switching strategy. A variable voltage gain is made possible by selecting the number of active switching cells, using an appropriate control method. This creates a set of voltage ratio ranges. In addition, the proposed topology and method of control enable a fault-tolerant operation of the FSCVM under various failures of the device. The paper presents an analysis of the concept, simulation results and an experimental verification in a three-cell FSCVM dc-dc resonant boost converter operating at a 200 watt charge. Issues regarding the selection of components related to the problem of inrush currents which can occur during the voltage ratio increase are also analyzed in this paper, and the design for low inrush currents is demonstrated.

15 May 2009 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
RSRobert Stala
Robert Stala
MBMarcin Baszynski
Marcin Baszynski
AMAndrzej Mondzik
Andrzej Mondzik
MBMarcin Baszynski
Marcin Baszynski
APAdam Penczek
Adam Penczek
SGStanislaw Gasiorek
Stanislaw Gasiorek
This paper presents an investigation of a multilevel multicell ac/ac converter. The converter employs flying capacitors, whose voltages should remain in a constant relation to the input ac voltage. An inadequate relation between the voltages across the flying capacitors (the imbalance state) results in an increase of voltages across the switches above their rated values. An RLC series circuit (a balancing circuit) with a properly selected resonance frequency was connected in parallel to the load in order to eliminate the imbalance. The balancing process with the use of a passive RLC depends on the configuration and parameters of the balancing circuit, the parameters of the converter, as well as on the operating conditions. This paper focuses on the impact of these parameters on the operation of the converter. Furthermore, the principle of operation of the multilevel multicell ac/ac converter with an application of the natural balancing process is described.

19 September 2012 in IEEE Transactions on Industrial Electronics
Verified
Journal Article
Closed access
RSRobert Stala
Robert Stala
This paper presents a method of natural dc-link capacitor voltage balancing of three- and single-phase neutral-point-clamped (NPC) inverters working in parallel configurations. It is proven that, in such parallel systems, when the inverters are insulated, the conditions for natural balancing can be achieved, and the application of a balancing circuit can assure the dc-link voltage balance independently on load. The method enables the natural balancing of single-phase single-branch NPC converters where natural balancing conditions do not occur. The application of the method presented in the three-phase NPC converter enables achievement of neutral dc-link voltage balance by the use of only one additional passive RLC circuit. In addition, the concept of lossless balancing in such systems is introduced. In the proposed system, by the application of a balancing circuit with a transformer and by using dedicated pulse with modulation, the balancing current flows in an unbalance state only. The unnecessary components of current that can flow in the balancing circuit are not present in the proposed solution. Simulations and experimental results in a system composed of two parallel inverters are presented to verify the concepts of natural balancing.

10 September 2021 in IEEE Access
Verified
Journal Article
Open access
SFSzymon Folmer
Szymon Folmer
RSRobert Stala
Robert Stala
This paper presents the concept and results of a novel resonant DC-DC converter which achieves high voltage gain at a low number of utilized switches, low voltage stress on transistors, ZVS and ZCS operation, high efficiency and variable voltage gain. The converter uses resonant switched-capacitors (SC) circuits with five switches which allows it to reach a six-fold voltage gain. By the application of adequate switching patterns, seven levels of voltage adjustment can be achieved. The basic operation mode of the converter is at zero current switching (ZCS) but a part of the existing transitions can be switched-on at a zero drain-source voltage. Zero voltage switching (ZVS) allows for a reduction of Coss losses and a decrease in disturbances of voltages and currents. In the proposed converter, voltage stress on switches are noticeably lower than the output voltage which is beneficial from viewpoint the cost reduction and switching quality improvement. The converter output stage consists of two series connected capacitors which allows for a supply of 3-level NPC inverters. Resonant inductors, used in the proposed topology, store very low amount of energy and their volume is significantly lower than in case of chokes typically used in switch-mode converters. Qualities of the converter such as low switch count, efficiency, ZCS and ZVS operation as well as voltage gain variation are demonstrated in this paper. Furthermore, an impact of MOSFET transistors type on the efficiency of the converter is investigated. The design based on low Coss superjunction (SJ) MOSFETs is compared with the implementation where Rds(on) of switches is minimized. Due to low voltage stress, application of Schottky rectifiers is also demonstrated in the converter. The concept of the topology and switching patterns is verified by the results of analysis, simulations and experiments.