The large integration of inverter-based resources will significantly alter grid dynamics, leading to pronounced stability challenges due to fundamental disparities between inverter-based and traditional energy systems. While grid-following inverters (GFLIs) dominate current inverter configurations, their increased penetration into the grid can result in major stability issues. In contrast, grid-forming inverters (GFMIs) excel over GFLIs by offering features like standalone operation, frequency support, and adaptability in weak grid scenarios. GFMIs, unlike GFLIs, control the AC voltage and frequency at the common coupling point, impacting the inverter dynamic response to grid disturbances and overall stability. Despite the existing literature highlighting differences between GFLIs and GFMIs and their control strategies, a comprehensive review of GFMIs’ stability and the effects of their control schemes on grid stability is lacking. This paper provides an in-depth evaluation of GFMIs’ stability, considering various control schemes and their dynamics. It also explores different types of power system stability, introduces new stability concepts that correspond to power grids with integrated inverters, i.e., resonance and converter-driven stability, and reviews small-signal and transient stability analyses, which are the main two types of GFMI stability studied in the literature. The paper further assesses existing studies on GFMI stability, pinpointing research gaps for future investigations.

Multi-terminal HVDC grids facilitate the integration of various renewable resources from distant locations; in addition, they enhance the reliability and stability of the grid. Protection is one of the major obstacles in realizing reliable and secure multi-terminal HVDC grids. This paper presents a comprehensive review of the existing protection schemes for multi-terminal HVDC grids. First, DC fault current stages are demonstrated; in addition, fault analysis studies and the existing fault current calculation methods are reviewed. Then, HVDC grid protection requirements including multi-vendor interoperability conditions are extensively discussed. Furthermore, primary protection algorithms are classified into single- and double-ended schemes, and a detailed comparison between each category is presented such that the distinctive algorithms from each group are highlighted. Moreover, the recent DC reclosing schemes are reviewed highlighting their role in enhancing grid stability and ensuring supply continuity. Finally, available standards for HVDC protection systems alongside their design considerations and procedures are thoroughly outlined. This paper focuses on the recently proposed methods to design reliable protection schemes for multi-terminal HVDC grids and highlights the main advantages and disadvantages associated with them; thus, it offers a beneficial guide for researchers in the HVDC protection field.

Modular multilevel converters (MMCs) based on half-bridge submodules (HBSMs) are unable to prevent the AC side contribution to DC side fault currents, thus necessitating circuit breakers (CBs) for protection. A solution to this problem is using submodules (SMs) that are capable of blocking the flow of current from the AC grid to feed the DC side fault. The full-bridge submodule (FBSM) is one type of fault blocking SM where the presence of two extra switches ensures that in the event of a DC fault, the reverse voltage from the FBSM capacitor is placed in the path of the AC side current feeding the DC side fault through the antiparallel diodes. However, the additional semiconductor switches in the FBSMs increase the converter cost, complexity, and losses. Several SM configurations have been proposed in recent years that provide DC fault blocking capability with lower losses and device counts than those of FBSMs. Besides, many of the proposed hybrid converter configurations that combine different topologies to optimize converter performance are also capable of providing DC fault blocking. Furthermore, certain SM topologies are capable of riding through DC faults by remaining deblocked and operating in static synchronous compensator (STATCOM) mode to provide reactive power support to the AC grid. In this paper, noteworthy SM and MMC configurations capable of DC fault blocking and ride-through are reviewed and compared in terms of component requirements, semiconductor losses, and DC fault handing capability. The review also includes a discussion on control strategies for MMC arm/leg energy balancing during STATCOM operation.

Protection of High Voltage Direct Current (HVDC) grids is a crucial step that requires further advancements to ensure the secure integration of green renewable energy sources (RESs). This paper proposes a fast, reliable, and selective singleended primary protection scheme for multi-terminal HVDC grids. In the proposed scheme, Hilbert-Huang Transform (HHT) is applied to local voltage measurements to extract the instantaneous frequency and energy features. Abrupt changes in these features during internal faults are detected as outliers. Simultaneous outliers in the extracted features correspond to internal faults, which offers a setting-less fault detection criterion; thus, eliminating the need for simulation-based and grid-specific thresholds. The proposed scheme can detect internal faults with high fault resistances up to 1000 Ω within 1 ms. In addition, the proposed scheme can reliably distinguish between internal and external faults even when the boundary reactor size is as small as 10 mH. A four-terminal HVDC grid is simulated in PSCAD/EMTDC software, and various fault scenarios are investigated to verify the effectiveness of the proposed scheme in detecting and discriminating between internal and external faults under severe fault conditions.

This paper presents a new protection scheme with low communication capacity requirement for protecting lines connected to a doubly‐fed induction generator (DFIG)‐based wind farm (WF). The proposed relaying scheme addresses the line protection challenges which stem from the non‐synchronous frequency component of the current fed from a DFIG‐based WF during a short‐circuit fault. The fault current frequency of a DFIG‐based WF deviates from the synchronous frequency during a fault, which affects the operation of distance relays. In such a scenario, the distance relay located at the WF terminal may lose its coordination with downstream relays, resulting in unnecessary tripping. The proposed scheme relies on the impedance trajectory captured by the local relay, local fault current characteristics, and the frequency tracking of the fault current measured at the distance relays located at the two ends of the transmission line connected to a DFIG‐based WF. The reliable performance of the proposed scheme is verified on a 4‐bus test system under balanced and unbalanced faults during super‐ and sub‐synchronous operating modes of the DFIG as well as its robustness against power system disturbances.