Solid-state transformers (SSTs) are power electronic converters that provide isolation between a medium-voltage and a low-voltage (LV) system using medium-frequency transformers. The power electronic stages enable full-range control of the terminal voltages and currents and hence of the active and reactive power flows. Thus, SSTs are envisioned as key components of a smart grid. Various SST concepts have been proposed and analyzed in literature concerning technical aspects. However, several issues could potentially limit the applicability of SSTs in distribution grids. Therefore, this paper discusses four essential challenges in detail. It is found that SSTs are less efficient than low-frequency transformers (LFTs), yet their prospective prices are significantly higher. Furthermore, SSTs are not compatible with the protection schemes employed in today’s LV grids, i. e., they are not drop-in replacements for LFTs. The limited voltage control range typically required in distribution grids can be provided by competing solutions, which do not involve power electronics (e. g., LFTs with tap changers), or by hybrid transformers, where the comparably inefficient power electronic stage processes only a fraction of the total power. Finally, potential application scenarios of SSTs (AC-DC, DC-DC, weight/space limited applications) are discussed. All considerations are distilled into an applicability flowchart for SST technology.
2 September 2016 in IEEE Journal of Emerging and Selected Topics in Power Electronics
For power electronic systems to interface medium-voltage grids, e.g., in future electric ships, usually cascaded cells converters need to be employed, whereby either few cells featuring power semiconductors with high blocking voltage capability or a larger number of cells using low-voltage (LV) semiconductors can be used. As shown in this paper, physics-inspired empirical models of the dependence of Insulated-Gate Bipolar Transistor (IGBT) power modules' loss-relevant characteristics on the blocking voltage enable an analytic optimization of the efficiency of a cascaded H-bridges (ac-dc) converter, which is complemented by a full efficiency versus power density ηρ-Pareto optimization. For a 10-kV grid, 1200V or 1700V are identified as optimum blocking voltages, resulting in a suitable trade-off between efficiency and power density. Significant efficiency and power density gains can be realized by replacing silicon IGBTs by LV silicon carbide (SiC) devices in multi-cell systems, whereas single-cell designs based on high-voltage SiC devices suffer from the high dv/dt and di/dt values required to limit switching losses. Reliability is analyzed considering redundancy, showing that the reliability of designs based on lower blocking voltages can be comparable with that of designs using higher blocking voltages, and hence fewer cells, if similar effort concerning additionally installed power capability is considered.
Today’s global megatrends—loosely defined as long-term trends that shape societies and economies worldwide—include, e.g., the transition to a fully renewable energy supply and the establishment of evermore stringent efficiency requirements for industry. Similarly, the trend of rapid global urbanization creates a need for sustainable mobility. The digital disruption contributes to increased electricity demand but on the other hand enables solutions such as smart energy networks or design, control, and monitoring systems supported by artificial intelligence (AI). Ultimately, future energy systems should seamlessly integrate, e.g., renewable energy sources, electric mobility, and industrial plants, i.e., they will be mostly electric.
10 May 2017 in IEEE Transactions on Power Electronics
The series resonant converter (SRC) operated in the half-cycle discontinuous-conduction-mode (HC-DCM) provides galvanic separation and a tight coupling of its input and output voltages in open-loop operation, i. e., with minimum control complexity, which renders it suitable for a wide range of applications that require galvanic isolation. This letter first explains the “DC transformer” behavior of the converter and then provides a generic derivation of a passive equivalent circuit that accurately models the converter’s terminal behavior. The proposed generic derivation yields the known analytic results for idealized cases, but additionally allows for a parametrization of the equivalent circuit based on simulated or measured waveforms, thereby facilitating high accuracy also in non-ideal cases. Furthermore, it is shown that a non-infinite magnetzining inductance results in an additional load-independent difference between the input and the output voltage, and a corresponding extension of the equivalent circuit model is proposed. The considerations are verified by simulations and measurements of a 10kW/ 350V/ 350V HCDCM SRC system.
27 October 2021 in IEEE Journal of Emerging and Selected Topics in Power Electronics
Solid-state transformers (SSTs) are employing compact high-power medium-voltage (MV) medium-frequency transformers (MFTs) and enable the power transfer between galvanically isolated DC systems. Considering a typical SST isolation stage, i.e., a 166 kW unregulated series-resonant DC–DC converter acting as a DC transformer (DCX) with equal input and output MV DC voltages of 7 kV (1:1-DCX), we derive component- and system-level performance limits of air-cooled realizations with either an air-core transformer (ACT) or with a magnetic-core transformer (MCT). We describe the design of two fully rated MFT prototypes in detail and provide a comprehensive experimental characterization to validate the derived performance limits, including the dielectric losses and the analysis of stray magnetic fields. The realized ACT and MCT prototypes achieve measured efficiencies of 99.5% and 99.7% at gravimetric power densities of 16.5 and 6.7 kW/kg, respectively. Considering 10 kV SiC MOSFETs, calculated system-level efficiencies of the ACT-based and MCT-based 1:1-DCX result in 99.0% and 99.2% at the nominal operating point, with similar part-load efficiency characteristics. This article concludes with an application-oriented qualitative evaluation of the two concepts.
Testing of power electronic converters can advantageously be carried out in power-hardware-in-the-loop (P-HIL) environments that emulate the behavior of power grids, electric motors, etc. The interface between the model and the device under test requires a power amplifier whose bandwidth ultimately limits the accuracy of the emulation. Hence, there is a need for general-purpose AC power amplifiers with ultra-high power bandwidth. This paper first provides a comprehensive review of amplifier concepts proposed over the past decades, i.e., linear power amplifiers, switch-mode amplifiers, including advanced variants such as multilevel (parallel-interleaving) and multicell (series-interleaving) topologies, as well as hybrid approaches that, e.g., combine analog and switch-mode stages. Based on this review, the two key concepts (parallel-interleaving of bridge-legs and cascading of converter cells) that facilitate high efficiency and ultra-high power bandwidth are identified and discussed, covering also suitable isolated mains interfaces and control considerations. Finally, we present a three-phase amplifier system that uses six cascaded converter cells per phase to realize an effective switching frequency of 3.6 MHz. The prototype thus achieves a measured power bandwidth of 100 kHz at the nominal phase output voltage of 230Vrms, and an output power of up to 10 kW per phase.