Riccardo Sisto

Prof. Dr. Riccardo Sisto

Department of Control and Computer Engineering, Politecnico di Torino, 10129 Torino, Italy
orcid

Research Focus & Metrics

Academic Career Length

37Years (1990-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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22 October 2010 in ACM SIGCOMM Computer Communication Review
Verified
Journal Article
Open access
NCNiccolo' Cascarano
Niccolo' Cascarano
PRPierluigi Rolando
Pierluigi Rolando
FRFulvio Risso
Fulvio Risso
RSRiccardo Sisto
Riccardo Sisto
This paper presents iNFAnt, a parallel engine for regular expression pattern matching. In contrast with traditional approaches, iNFAnt adopts non-deterministic automata, allowing the compilation of very large and complex rule sets that are otherwise hard to treat. iNFAnt is explicitly designed and developed to run on graphical processing units that provide large amounts of concurrent threads; this parallelism is exploited to handle the non-determinism of the model and to process multiple packets at once, thus achieving high performance levels.

1 January 2014 in Formal Aspects of Computing
Verified
Journal Article
Open access
PDF file
MAMatteo Avalle
Matteo Avalle
APAlfredo Pironti
Alfredo Pironti
RSRiccardo Sisto
Riccardo Sisto
Automated formal verification of security protocols has been mostly focused on analyzing high-level abstract models which, however, are significantly different from real protocol implementations written in programming languages. Recently, some researchers have started investigating techniques that bring automated formal proofs closer to real implementations. This paper surveys these attempts, focusing on approaches that target the application code that implements protocol logic, rather than the libraries that implement cryptography. According to these approaches, libraries are assumed to correctly implement some models. The aim is to derive formal proofs that, under this assumption, give assurance about the application code that implements the protocol logic. The two main approaches of model extraction and code generation are presented, along with the main techniques adopted for each approach.

1 October 1990 in IEEE Micro
Verified
Journal Article
Closed access
GAG. Albertengo
G. Albertengo
RSRiccardo Sisto
Riccardo Sisto
Theoretical aspects of encoding cyclic redundant codes (CRCs) are reviewed. A method of designing hardware parallel encoders for CRCs that is based on digital system theory and z-transforms is presented. It allows designers to derive the logic equations of the parallel encoder circuit for any generator polynomial. A few interesting application areas for hardware parallel encoders are pointed out.

1 June 1999 in Software: Practice and Experience
Verified
Journal Article
Closed access
PDF file
CDClaudio Demartini
Claudio Demartini
RIRadu Iosif
Radu Iosif
RSRiccardo Sisto
Riccardo Sisto

6 October 2020 in IEEE Transactions on Vehicular Technology
Verified
Journal Article
Closed access
MIMarco Iorio
Marco Iorio
MRMassimo Reineri
Massimo Reineri
FRFulvio Risso
Fulvio Risso
RSRiccardo Sisto
Riccardo Sisto
FVFulvio Valenza
Fulvio Valenza

17 March 2022 in IEEE Transactions on Dependable and Secure Computing
Verified
Journal Article
Open access
DBDaniele Bringhenti
Daniele Bringhenti
GMGuido Marchetto
Guido Marchetto
RSRiccardo Sisto
Riccardo Sisto
FVFulvio Valenza
Fulvio Valenza
JYJalolliddin Yusupov
Jalolliddin Yusupov
The configuration of security functions in computer networks is still typically performed manually, which likely leads to security breaches and long re-configuration times. This problem is exacerbated for modern networks based on network virtualization, because their complexity and dynamics make a correct manual configuration practically unfeasible. This article focuses on packet filters, i.e., the most common firewall technology used in computer networks, and it proposes a new methodology to automatically define the allocation scheme and configuration of packet filters in the logical topology of a virtual network. The proposed method is based on solving a carefully designed partial weighted Maximum Satisfiability Modulo Theories problem by means of a state of the art solver. This approach formally guarantees the correctness of the solution, i.e., that all security requirements are satisfied, and it minimizes the number of needed firewalls and firewall rules. This methodology is extensively evaluated using different metrics and tests on both synthetic and real use cases, and compared to the state-of-the-art solutions, showing its superiority.