Updating the Triode with Graphene: In early electronics, the triode—a vacuum device that combined a diode and an electrical grid—was used to control and amplify signals, but was replaced in most applications by solid-state silicon electronics. One characteristic of silicon-metal interfaces is that the Schottky barrier created—which acts as a diode—does not change with the work function of the metal—the Fermi level is pinned by the presence of surface states. Yang et al. (p. 1140 , published online 17 May) now show that for a graphene-silicon interface, Fermi-level pinning can be overcome and a triode-type device with a variable barrier, a “barristor,” can be made and used to create devices such as inverters.

With the motivation of realizing an all graphene-based circuit for low power, we present a reliable nonvolatile graphene memory device, single-layer graphene (SLG) ferroelectric field-effect transistor (FFET). We demonstrate that exfoliated single-layer graphene can be optically visible on a ferroelectric lead-zirconate-titanate (PZT) substrate and observe a large memory window that is nearly equivalent to the hysteresis of the PZT at low operating voltages in a graphene FFET. In comparison to exfoliated graphene, FFETs fabricated with chemical vapor deposited (CVD) graphene exhibit enhanced stability through a bi-stable current state operation with long retention time. In addition, we suggest that the trapping/de-trapping of charge carriers in the interface states is responsible for the anti-hysteresis behavior in graphene FFET on PZT.

Device instabilities of graphene metal-oxide-semiconductor field effect transistors such as hysteresis and Dirac point shifts have been attributed to charge trapping in the underlying substrate, especially in ${\text{SiO}}_2$ . In this letter, trapping time constants around $87\mu \text{s}$ and 1.76 ms were identified using a short pulse current-voltage method. The values of two trapping time constants with reversible trapping behavior indicate that the hysteretic behaviors of graphene field effect transistors are due to neither charge trapping in the bulk ${\text{SiO}}_2$ or tunneling into other interfacial materials. Also, it is concluded that the dc measurement method significantly underestimated the performance of graphene devices.

Evolution of a single graphene layer with disorder generated by remote oxygen plasma irradiation is investigated using atomic force microscopy, Raman spectroscopy and electrical measurement. Gradual changes of surface morphology from planar graphene to isolated granular structure associated with a decrease of transconductance are accounted for by two-dimensional percolative conduction by disorder and the oxygen plasma-induced doping effect. The corresponding evolution of Raman spectra of graphene shows several peculiarities such as a sudden appearance of a saturated D peak followed by a linear decrease in its intensity, a relatively inert characteristic of a D' peak and a monotonic increase of a G peak position as the exposure time to oxygen plasma increases. These are discussed in terms of a disorder-induced change of Raman spectra in the graphite system.