This paper proposes a low-temperature coefficient (TC), noise, and offset bandgap reference (BGR) for the high precision applications. In order to reduce the offset voltage and noise introduced by the error amplifier, the offset and noise suppression technique is proposed. A five-piece linear compensation has been applied in the BGR to improve the TC performance. Moreover, an adaptive current loop is added to the bandgap reference to enhance the current driving capability. The proposed BGR is implemented in a 0.35 μm standard CMOS process occupying an active area of 0.22 x 0.28 mm². The measured results show that the average TC is 3 ppm/°C from -45 °C to 125 °C after trimming. The output reference voltage of 2.47 V can achieve 3.6 μV (rms) noise from 0.1 to 10 Hz. In the supply voltage range of 2.6 to 5 V, the proposed BGR can deliver 30 μA load current and its PSRR is about -83 dB @ 100Hz.
7 July 2020 in IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents a low-power and high-precision bandgap voltage and current reference (BGVCR) in one simple circuit for battery-powered applications. All the amplifiers have been eliminated in the proposed circuit. The voltage reference is derived from the bandgap topology, and the current reference is obtained by summing a proportional-to-absolute-temperature (PTAT) current and a complementary-to-absolute-temperature (CTAT) current. Therefore, the temperature coefficient of the current reference can be optimized. Besides, a pseudo-cascode structure and a simple line sensitivity enhancement circuit are adopted to improve the current mirror accuracy and line sensitivity. The proposed circuit is fabricated in a 0.18-μm deep N-well CMOS process with an active area of 0.063 mm2. The measured VREF and IREF are 1.2 V and 51 nA, respectively. The VREF and IREF show measured average temperature coefficients of 32.7 ppm/∘C and 89 ppm/∘C at a temperature of -45 to 125∘C and standard deviations of 0.17 % and 1.15 %, respectively. In the supply voltage range of 2 to 5 V, the line sensitivities of voltage and current are 0.058%/V and 1.76%/V, respectively. The minimum supply voltage is 2 V with a total power consumption of 192 nW at room temperature.
24 May 2021 in IEEE Transactions on Power Electronics
An ultralow-quiescent current dc-dc buck converter with a single controller is presented to achieve high efficiency over a wide load range for Internet of Things application, which is achieved by utilizing adaptive on-time control topology. An on-demand modulation strategy and sleep-time detector are proposed to attain sub-μA quiescent current consumption under ultralight load condition. The adaptive-bias and adaptive-gain (A 2 ) comparator is presented to improve the loop stability caused by the inherent propagation delay of the low-power comparator. Moreover, a novel on-time generator is proposed to fix the switching frequency in continuous conduction mode. The proposed buck converter was implemented by using a 0.18-μm CMOS process with an area of 1.092 mm 2 . It achieves a peak efficiency of 95.8% and >90% efficiency from 10 μA to 300 mA. A 240-nA quiescent current, including bandgap voltage and current reference, is achieved. With a low output ripple of less than 20 mV, the input voltage range and regulated output voltage are 2.1-5.5 and 1.8 V, respectively.
31 January 2018 in IEEE Transactions on Circuits and Systems I: Regular Papers
This paper proposed a high efficiency boost converter targeting thermoelectric generator energy harvesting. The proposed converter adopts the critical conduction mode rather than the discontinuous mode to reduce the conduction loss, which can improve the peak efficiency at high input power. To reduce the minimum input voltage, an adaptive on-resistance switch, which can automatically change the high side and low side on-resistance according to the input voltage, is used. To maximize the output power, a maximum power point tracking circuit is designed to track the internal source resistance. Radio frequency (RF) kick-up and low voltage startup are used to improve the cold start voltage. The proposed converter is implemented in a 0.18-μm standard CMOS process, which occupies a chip area of about 0.48 mm². Measurement results show that the peak efficiency of the converter can be up to 90.8% and 60% at 180 and 20 mV of the open-circuit voltage, respectively. Owing to the cold startup circuit, the proposed converter can start successfully with 260-mV open-circuit voltage or -16-dBm RF input. Moreover, the open-circuit voltage can be further lowered to 12 mV with 1.5-μW output power after startup.
16 June 2017 in IEEE Transactions on Circuits and Systems I: Regular Papers
This paper proposes an ultralow power, high precision sub bandgap voltage reference (sub-BGR) for low-voltage self-powered devices. A novel ultralow power curvature compensation circuit is proposed to improve the temperature coefficient over a wide temperature range. A switch capacitor voltage divider with improved leakage current reduction switches is used to obtain a high accuracy and a low power. To minimize the clock feedthrough and charge injection in the switches, a clock scaling down circuit is proposed, that effectively improves the line sensitivity (LS) of the sub-BGR. The proposed sub-BGR is implemented in a 0.18-μm standard CMOS process with a total area of 0.061 mm 2 . After measuring 30 chips, the average power consumption is 83 nW at 0.55 V of supply at 27°C. In the supply voltage range of 0.55 to 1 V, the LS is 0.059%/V, and the error is ±0.75% (3σ) after trimming.
25 August 2016 in IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents a 40-nW 0.5-V supply voltage and 0.24-V output reference for an energy harvester. The emitter-base voltage of a PNP transistor is divided by the presented switch capacitor circuit to obtain the low output reference. The resistorless proportional-to-absolute-temperature circuit and the low-voltage high-power-supply-rejection-ratio current source are used to improve the accuracy and line regulation performance of the reference. The proposed bandgap reference is implemented in a 0.18-μm standard complementary metal-oxide-semiconductor process and has a total area of 0.058 mm 2 . Test results show that the minimum supply voltage is 0.5 V due to the clock bootstrap and 2 × VDD doubler. The line regulation is about 1.1 mV/V in the supply voltage range of 0.5-0.9 V. With 3-bit trimming, the temperature coefficient of 58 ppm/°C in the range of -25°C-85°C and the accuracy of 0.9% (3δ) can be achieved.