Analytical models for vias and traces are presented for simulation of multilayer interconnects at the package and printed circuit board levels. Vias are modeled using an analytical formulation for the parallel-plate impedance and capacitive elements, whereas the trace-via transitions are described by modal decomposition. It is shown that the models can be applied to efficiently simulate a wide range of structures. Different scenarios are analyzed including thru-hole and buried vias, power vias, and coupled traces routed into different layers. By virtue of the modal decomposition, the proposed method is general enough to handle structures with mixed reference planes. For the first time, these models have been validated against full-wave methods and measurements up to 40 GHz. An improvement on the computation speed of at least two orders of magnitude has been observed with respect to full-wave simulations.

We demonstrate 4 × 4 and 8 × 8 switch fabrics in multistage topologies based on 2 × 2 Mach-Zehnder interferometer switching elements. These fabrics are integrated onto a single chip with digital CMOS logic, device drivers, thermo-optic phase tuners, and electro-optic phase modulators using IBM's 90 nm silicon integrated nanophotonics technology. We show that the various switch-and-driver systems are capable of delivering nanosecond-scale reconfiguration times, low crosstalk, compact footprints, low power dissipations, and broad spectral bandwidths. Moreover, we validate the dynamic reconfigurability of the switch fabric changing the state of the fabric using time slots with sub-100-ns durations. We further verify the integrity of high-speed data transfers under such dynamic operation. This chip-scale switching system technology may provide a compelling solution to replace some routing functionality currently implemented as bandwidth- and power-limited electronic switch chips in high-performance computing systems.

What package improvements are required for dense, high-aggregate bandwidth buses running at data rates beyond 10 Gb/s per channel, and when might optical interconnects on the board be required? We present a study of distance and speed limits for electrical on-board module-to-module links with an eye to answering these questions. Hardware-validated models of advanced organic modules and printed circuit boards were used to explore these limits. Simulations of link performance performed with an internal link modeling tool allowed us to explore the effect of equalization and modulation formats at different data rates on link bit error rate and eye opening. Our link models have been validated with active, high-speed differential bus measurements utilizing a 16-channel link chip with programmable equalization and a per-channel data rate of up to 11 Gb/s. Electrical signaling limits were then determined by extrapolating these hardware-correlated models to higher speeds, and these limits were compared to the results of recent work on on-board optical interconnects.

Exact and consistent modeling of circularly shaped ports in the power/ground plane analysis under the assumption of isotropic excitations is addressed in this paper. Novel expressions are first derived for accurate calculation of the parallel-plate impedance of circular ports in the cavity resonator method. These ports are usually approximated as either rectangular or linear ones, leading to inaccurate results at high frequencies. The second part of this paper develops a novel semianalytical approach, derived from the contour integral equation, for modeling of circular ports assuming infinitely large reference planes. It will be shown that the radial waveguide method is a low frequency approximation of our approach and neglects the scattering among the open ports. The analytical solutions for infinite planes are then combined with the contour integral method to model finite-sized power planes. This improves the computational efficiency since a discretization of circular ports is avoided, especially for problems with a large number of circular ports.

This paper studies the accuracy of the physics-based via model, specifically when applied to dense via arrays. The physics-based model uses Green's functions for cylindrical waves in radial waveguides to model the via return current paths and the coupling between vias. The effects of approximations made in this model are studied with regard to four types of modes based on an eigenmode expansion for the radial waveguide. It is found that for the mode conversion in the vicinity of the via, an accurate consideration of nonpropagating modes becomes critical with an increasing cavity height. For the interaction between vias in dense arrays, anisotropic modes have an impact for small pitches, whereas the coupling by nonpropagating modes is small for practical printed circuit board dimensions. For a data rate of 20 Gb/s, conclusions with regard to the applicability of the physics-based via model to a multilayer structure are drawn. For 80-mil pitch, a good agreement to full-wave results can be observed. Measurements have been carried out to validate this finding. For 40-mil pitch, the accuracy of the physics-based via model is not sufficient for data rates of 20 Gb/s or higher.

This paper presents a method for fast and comprehensive simulation of signal propagation, power/ground noise, and radiated emissions by combining the merits of the physics-based via model, the modal decomposition technique, the contour integral method (CIM), and the equivalence principle. The physics-based via model combined with the modal decomposition technique is an efficient technique for signal integrity analysis of multilayer PCBs and packages. The CIM can be used to calculate the voltage distribution between arbitrarily shaped power planes. Far-field radiation can be obtained by applying the field equivalence principle. In this paper, we integrate the four techniques to analyze all the three effects in a fast, concurrent, and holistic manner. To the best knowledge of the authors, the four techniques are integrated here for the first time. Various structures are simulated and validated with full-wave simulations up to 20 GHz. It is shown that a reduction in simulation time of more than two orders of magnitude is achieved in comparison to a standard full-wave electromagnetic solver.