Drone-aided ubiquitous applications play important roles in our daily lives. Accurate recognition of drones is required in aviation management due to their potential risks and disasters. Radiofrequency (RF) fingerprinting-based recognition technology based on deep learning (DL) is considered an effective approach to extracting hidden abstract features from the RF data of drones. Existing deep learning-based methods are either high computational burdens or have low accuracy. In this paper, we propose a deep complex-valued convolutional neural network (DC-CNN) method based on RF fingerprinting for recognizing different drones. Compared with existing recognition methods, the DC-CNN method has a high recognition accuracy, fast running time, and small network complexity. Nine algorithm models and two datasets are used to represent the superior performance of our system. Experimental results show that our proposed DC-CNN can achieve recognition accuracies of 99.5% and 74.1%, respectively, on four and eight classes of RF drone datasets.

In this paper, we propose a few-shot indoor position method based on Triplet Matchnet, which transforms coordinate positioning into channel state information (CSI) similarity matching problem. Triplet loss is designed to train and learn hidden correspondence between CSI features and physical space positions, with emphasis on minimizing distance or angle-based triplet loss. Then, according to pre-trained network with best similarity match, a similarity score map of CSI with unknown coordinates is constructed to predict position precisely. Experimental results show that angle-based triplet loss can obtain more accurate CSI fingerprint similarity matching accuracy. Compared with existing methods, experiment results confirm that our proposed method can achieve excellent positioning performance with few-shot datasets.

With the rapid development of wireless communications technology, long term evolution (LTE) technology in unlicensed bands (LTE-U) can effectively solve the lack of spectrum resources. However, the competition in LTE-U and wireless fidelity (WiFi) will seriously interfere their communication quality, which making the friendly coexistence of LTE-U and WiFi becomes a hot research area. In this paper, we propose a classification algorithm based on deep learning to realize the identification of LTE-U and WiFi signal. Experiment results use mixed data at different signal to noise ratios (SNRs) and compare the classification results within two data forms. Experimental results show that our proposed deep learning-aided method can effectively distinguish LTE-U and WiFi signals and further achieve their friendly coexistence.

Macro placement is a crucial and complex task in chip design. In recent years, reinforcement learning (RL) has emerged as a promising approach for autonomously generating effective macro placement on a grid-based chip canvas. However, existing RL-based macro placers encounter challenges when handling macros of varying sizes and preplaced blocks, due to using coarse-grained grids leads to wastage of placement space, while employing fine-grained grids results in an exponentially growing solution space and significant computational overhead. This brief proposes a legalization-aided RL-based macro placement (LAMPlace) for mixed-size designs with preplaced blocks. LAMPlace leverages RL to generate a global macro placement that allows possible overlap, followed by a macro legalization algorithm to ensure the legality of macro placement. LAMPlace can effectively address macros of various sizes and preplaced blocks because the action mask generation algorithm in RL is well coupled with the macro legalization algorithm. Compared with the state-of-the-art works, experimental results on publicly mixed-size placement benchmarks show that LAMPlace is effective.

In very large scale integration (VLSI) circuit physical design, precise congestion prediction during placement is crucial for enhancing routability and accelerating design processes. Existing congestion prediction models often encounter challenges in handling multimodal information and lack effective fusion of placement and netlist features, limiting their prediction accuracy. In this paper, we present a novel congestion prediction model that leverages dual multimodal fusions with convolution and transformer layers to effectively capture the multiscale placement information and enhance congestion prediction accuracy. We first adopt convolutional neural networks (CNN) to extract grid-based placement features and heterogeneous graph convolutional networks (HGCN) to extract netlist information. To help the model understand the correlation between different modalities, we then propose an early feature fusion (EFF) to integrate netlist knowledge into multiscale placement features at multimodal interaction subspace. Besides, a deep feature fusion (DFF) method is proposed to further fuse multimodal features, which has multiple vision transformer layers based on adaptive attention enhancement technology. These layers include self-attention to boost intra-modal features and cross-attention to perform cross-modal feature fusion on netlist and grid-based placement features. Finally, the output features of DFF are sent into the cascaded decoder to recover the congestion map by exploiting several upsampling layers and merging with EFF features. Compared with the existing state-of-the-art congestion prediction models, experimental results demonstrate that our model not only outperforms them in prediction accuracy, but also excels in reducing routing congestion when integrated into the placer DREAMPlace.

Field-programmable gate array (FPGA) macro placement holds a crucial role within the FPGA physical design flow since it substantially influences the subsequent stages of cell placement and routing. With the increasing number of macros and the complex cascade shape and region constraints imposed by modern FPGAs, the routability and macro placement have become much more challenging. In this article, we propose an effective and efficient routability-driven macro placement algorithm for modern FPGAs with cascade shape and region constraints. To reserve adequate space for cell placement and guarantee routability, we first develop a routability-driven mixed-size analytical global placement that evenly distributes both macros and cells while considering cascade shape and region constraints. Particularly, the proposed global placement engine integrates a well-trained congestion prediction model, targeting benchmarks with high routing congestion to enhance overall routability. Then, we propose an integer linear programming (ILP)-based cascade shape legalization followed by matching-based macro legalization to remove macro overlaps while satisfying the region constraints. Finally, a routability-driven detailed macro placement is proposed to refine the solution. Compared with the winners of the MLCAD 2023 FPGA macro placement contest and state-of-the-art works, experimental results show that our algorithm achieves the best overall score and routability.