Behrooz Sangchoolie

Dr. Behrooz Sangchoolie

orcid

Research Focus & Metrics

Academic Career Length

9Years (2018-Present)

(Calculated once Scilit publication data is synced: current year − year of first publication + 1)

Representative Publications

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8 December 2020 in IEEE Transactions on Dependable and Secure Computing
Verified
Journal Article
Closed access
BSBehrooz Sangchoolie
Behrooz Sangchoolie
KPKarthik Pattabiraman
Karthik Pattabiraman
JKJohan Karlsson
Johan Karlsson
Recent studies have shown that technology and voltage scaling are expected to increase the likelihood that particle-induced soft errors manifest as multiple-bit errors. This raises concerns about the validity of using single bit-flips in fault injection experiments aiming to assess the program-level impact of soft errors. The goal of this paper is to investigate whether multiple-bit errors could cause a higher percentage of silent data corruptions (SDCs) compared to single-bit errors. Based on 2700 fault injection campaigns with 15 benchmark programs, featuring a total of 27 million experiments, our results show that single-bit errors in most cases either yield a higher percentage of SDCs compared to multiple-bit errors or yield SDC results that are very close to the ones obtained for the multiple-bit errors. Further, we find that only around 2% of the multiple-bit campaigns resulted in an SDC percentage that was more than 5 percentage points higher than that obtained for the corresponding single-bit campaigns. For most of these campaigns, the highest percentage of SDCs was obtained by flipping at most 3 bits. Based on our results, we also propose four techniques for error space pruning to avoid injection of multiple-bit errors that are either unlikely or infeasible to cause SDCs.

1 April 2022 in Journal of Systems and Software
Verified
Journal Article
Open access
RJRodi Jolak
Rodi Jolak
TRThomas Rosenstatter
Thomas Rosenstatter
MMMazen Mohamad
Mazen Mohamad
KSKim Strandberg
Kim Strandberg
BSBehrooz Sangchoolie
Behrooz Sangchoolie
RSRiccardo Scandariato
Riccardo Scandariato


9 August 2019
Verified
Book Chapter
Closed access
PDF file
LSLijun Shan
Lijun Shan
BSBehrooz Sangchoolie
Behrooz Sangchoolie
PFPeter Folkesson
Peter Folkesson
JVJonny Vinter
Jonny Vinter
ESErwin Schoitsch
Erwin Schoitsch
CLClaire Loiseaux
Claire Loiseaux

1 November 2021 in Microprocessors and Microsystems
Verified
Journal Article
Open access
JAJ.A. Agirre
J.A. Agirre
LEL. Etxeberria
L. Etxeberria
RBR. Barbosa
R. Barbosa
SBS. Basagiannis
S. Basagiannis
GGG. Giantamidis
G. Giantamidis
BSBehrooz Sangchoolie
Behrooz Sangchoolie

28 December 2023 in Open Research Europe
Verified
Journal Article
Open access
ASAleš Smrčka
Aleš Smrčka
BSBehrooz Sangchoolie
Behrooz Sangchoolie
EMEmanuele Mingozzi
Emanuele Mingozzi
JVJose Luis de la Vara
Jose Luis de la Vara
MFMarie Farrell
Marie Farrell
AKAlper Kanak
Alper Kanak
Verification and validation (V&V) are complex processes combining different approaches and incorporating many different methods including many activities. System engineers regularly face the question if their V&V activities lead to better products, and having appropriate criteria at hand for evaluation of safety and cybersecurity of the systems would help to answer such a question. Additionally, when there is a demand to improve the quality of an already managed V&V process, there is a struggle over what criteria to use in order to measure the improvement. This paper presents an extensive set of criteria suitable for safety and cybersecurity evaluation of cyberphysical systems. The evaluation criteria are agreed upon by 60 researchers from 32 academic and industrial organizations jointly working in a large-scale European research project on 13 real-world use cases from the domains of automotive, railway, aerospace, agriculture, healthcare, and industrial robotics.