To fulfill the functionality demands from the fast developing optical networks, a hybrid integration approach allows for combining the advantages of various material platforms. We have established a polymer-based hybrid integration platform (polyboard), which provides flexible optical input/ouptut interfaces (I/Os) that allow robust coupling of indium phosphide (InP)-based active components, passive insertion of thin-film-based optical elements, and on-chip attachment of optical fibers. This work reviews the recent progress of our polyboard platform. On the fundamental level, multi-core waveguides and polymer/silicon nitride heterogeneous waveguides have been fabricated, broadening device design possibilities and enabling 3D photonic integration. Furthermore, 40-channel optical line terminals and compact, bi-directional optical network units have been developed as highly functional, low-cost devices for the wavelength division multiplexed passive optical network. On a larger scale, thermo-optic elements, thin-film elements and an InP gain chip have been integrated on the polyboard to realize a colorless, dual-polarization optical 90° hybrid as the frontend of a coherent receiver. For high-end applications, a wavelength tunable 100Gbaud transmitter module has been demonstrated, manifesting the joint contribution from the polyboard technology, high speed polymer electro-optic modulator, InP driver electronics and ceramic electronic interconnects.

We demonstrate a 2 × 100 Gb/s transmitter and a 4 × 100 Gb/s receiver as the key components for multi-100-GbE and 400-GbE optical interfaces in future intradata center networks. Compared to other approaches, the two devices can provide significant advantages in terms of number of components, simplicity, footprint, and cost, as they are capable of serial operation with nonreturn-to-zero on-off keying format directly at 100 Gb/s. The transmitter is based on the monolithic integration of a multimode interference coupler with two Mach-Zehnder modulators on an electro-optic polymer chip, and the hybrid integration of this chip with an InP laser diode and two multiplexing and driving circuits. The receiver on the other hand is based on the hybrid integration of a quad array of InP photodiodes with two demultiplexing circuits. Combining the two devices, we evaluate their transmission performance over standard single-mode fibers without dispersion compensation and achieve a BER of 10 ^-10 after 1000 m and a BER below 10 ^-8 after 1625 m at 2 × 80 Gb/s, as well as a BER below 10 ^-7 after 1000 m at 2 × 100 Gb/s. Future plans including the development of tunable 100 GbE interfaces for optical circuit-switched domains inside data center networks are also discussed.

This article presents a compact, planar, and circularly polarized array antenna operating in the W-band (84.5–110 GHz), with all its prototypes fabricated using a low-cost, traditional, microwave printed circuit board composed of Rogers RT/duroid 5880 (εr = 2.2, tanδ = 0.009). The final design that was fabricated and measured was a 4 × 4 array antenna having an overall size of 9 mm × 20 mm × 0.254 mm that used series feeding to reduce its sidelobes. Measurements of the 4 × 4 patch antenna array showed approximately 6.9% 3-dB axial ratio bandwidth along with 15.2 dBi maximum right-hand circularly polarized (RHCP) antenna gain at 100 GHz. The array antenna yielded RHCP radiation characterized by a low profile, low cross-polarization levels (<−25 dB), low sidelobe levels (≤−10 dB), and high radiation efficiency (>91%). Additionally, a two-port MIMO antenna system was investigated by considering side-by-side and front-tofront configurations, both of which achieved good isolation and considerable envelope correlation coefficient and diversity gain values. Therefore, the proposed series array and MIMO antennas can be reasonable candidates for 6G applications of the sub-THz band (100– 110 GHz) in ultra-high-speed wireless and satellite communication systems.

This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying a slant-gate structure and drain-side extended field-plate (FP) for improved breakdown voltage. Prior to the analysis of slant-gate-based HEMT, simulation parameters were extracted from the measured data of fabricated basic T-gate HEMTs to secure the reliability of the results. We suggest three different types of slant-gate structures that connect the basic T-gate electrode boundary to the 1st and 2nd SiN passivation layers obliquely. To consider both the breakdown voltage and frequency characteristics, the DC and RF characteristics of various slant-gate structures including the self-heating effect were analyzed by TCAD simulation. We then applied a drain-side extended FP to further increase the breakdown voltage. The maximum breakdown voltage was achieved at the FP length of 0.4 μm. Finally, we conclude that the slant-gate structures can improve breakdown voltage by up to 66% without compromising the frequency characteristics of the HEMT. When the drain-side FP is applied to a slant-gate structure, the breakdown voltage is further improved by up to 108%, but the frequency characteristics deteriorate. Therefore, AlGaN/GaN HEMTs with an optimized slant-gate-based structure can ultimately be a promising candidate for high-power and high-frequency applications.

This paper addresses the systematic approach to optimize series inductance in the inductively peaked pin photodiode for high speed operation beyond 100 Gb/s. For this end, peak distortion analysis is introduced in addition to group delay dispersion technique. Through analytical analysis and comprehensive numerical simulations, inductance values are calculated to optimize vertical eye-opening and signal-to-noise ratio. For verification, an optical waveguide integrated pin photodiode with optimized inductance is fabricated and measured. Using the optical pulse measurement setup, its pulse response is measured, and a full-width at half maximum of 7.34 ps is obtained. The fabricated module is tested using 107 Gb/s return-to-zero signal and shows excellent eye-opening.

We demonstrate an Si Schottky diode sampling demultiplexer circuit for an optical receiver. A system model and the operation principle of the sampling demultiplexer are described. The Si Schottky diode sampling circuit has been realized in conductor-backed coplanar waveguide technology and fabricated in thin-film technology. The sampling circuit module was measured using a 43-Gb/s nonreturn-to-zero signal. In addition, for the purpose of reducing the intersymbol interference, a linear tapped delay-line equalizer circuit has been designed and simulated. The weight of the taps has been calculated employing a zero-forcing algorithm.