Electronic bipolar resistance switching (eBRS) in an Al/TiO_x/Al structure, where the TiO_x layer was reactively sputter-deposited, was examined in conjunction with a structural analysis using transmission electron microscopy. A thin (3–5 nm) insulating Al(Ti)O_x layer was formed at the bottom Al electrode interface, which provided the necessary asymmetric potential barrier for the eBRS to emerge, whereas the top Al electrode interface appeared to have provided the fluent carrier (electron) injection. The set and reset switching were related to the trapping and detrapping of the carriers at the trap centers, the characteristic energy of which was ∼0.86 eV, across the entire electrode area. The general features of this material system as the feasible RS memory were insufficient: endurance cycle, <∼8000, and retention time at 85 °C, 10⁶ s. However, the detailed analysis of the switching behavior based on the space-charge limited current conduction mechanism, and its variation with the switching cycles, provided useful information on the general features of the eBRS, which could also be applicable to other binary (or even ternary) metal–oxide RS systems based on the electronic switching mechanism.

SiO₂ is the most significantly used insulator layer in semiconductor devices. Its functionality was recently extended to resistance switching random access memory, where the defective SiO₂ played an active role as the resistance switching (RS) layer. In this report, the bias-polarity-dependent RS behaviours in the top electrode W-sputtered SiO₂-bottom electrode Pt (W/SiO₂/Pt) structure were examined based on the current-voltage (I-V) sweep. When the memory cell was electroformed with a negative bias applied to the W electrode, the memory cell showed a typical electronic switching mechanism with a resistance ratio of ~100 and high reliability. For electroforming with opposite bias polarity, typical ionic-defect-mediated (conducting filament) RS was observed with lower reliability. Such distinctive RS mechanisms depending on the electroforming-bias polarity could be further confirmed using the light illumination study. Devices with similar electrode structures with a thin intervening Si layer between the SiO₂ and Pt electrode, to improve the RS film morphology (root-mean-squared roughness of ~1.7 nm), were also fabricated. Their RS performances were almost identical to that of the single-layer SiO₂ sample with very high roughness (root-mean-squared roughness of ~10 nm), suggesting that the reported RS behaviours were inherent to the material property.

Ta₂O₅ has been an appealing contender for the resistance switching random access memory (ReRAM). The resistance switching (RS) in this material is induced by the repeated formation and rupture of the conducting filaments (CFs) in the oxide layer, which are accompanied by the almost inevitable randomness of the switching parameters. In this work, a 1 to 2 nm-thick Ti layer was deposited on the 10 nm-thick Ta₂O₅ RS layer, which greatly improved the RS performances, including the much-improved switching uniformity. The Ti metal layer was naturally oxidized to TiO_x (x < 2) and played the role of a series resistor, whose resistance value was comparable to the on-state resistance of the Ta₂O₅ RS layer. The series resistor TiO_x efficiently suppressed the adverse effects of the voltage (or current) overshooting at the moment of switching by the appropriate voltage partake effect, which increased the controllability of the CF formation and rupture. The switching cycle endurance was increased by two orders of magnitude even during the severe current–voltage sweep tests compared with the samples without the thin TiO_x layer. The Ti deposition did not induce any significant overhead to the fabrication process, making the process highly promising for the mass production of a reliable ReRAM.

Thin metal interfacial layers (1-nm-thick Ti and Hf) were exploited as the appropriate interfacial layer for forming an interfacial (buffer) layer between the 10-nm-thick Ta₂O₅ resistance switching layer and the Ta electrode to enhance the switching cycle endurance and uniformity. The thin metal interfacial layers were in-situ oxidized to TiO_x (x < 2) and HfO₂ layers, respectively, during the ion beam sputter deposition on the Ta₂O₅ layer. Compared with the devices with no interfacial layers, the switching uniformity was improved for both interfacial layers, with Ti showing the greatest improvement. The switching cycle endurance was largely degraded for the HfO₂ interfacial layer, whereas the TiO_x interfacial layer greatly improved in such aspects. The appropriate level of Ti-O bond energy and an excessively high Hf-O bond energy were suggested as the main reasons for such a critical difference.

Based on credible advantages, organic materials have received more and more attention in memristor and synapse emulation. In particular, an implementation of the ionic pathway as a dielectric layer is essential for organic materials used as building blocks of memristor and artificial synaptic devices. Herein, we describe an evaluation of the use of positive and negative polyelectrolytes as dielectric layers for a memristor with calcium ion (Ca²⁺) doping. The device based on a negative polyelectrolyte shows the potential to obtain an excellent resistive switching performance and synapse functionality, especially in the transformation behaviours from short-term plasticity (STP) to long-term plasticity (LTP) in both the potentiation and depression processes, which were comparable to the perfomrmance obtained with a positive polyelectrolyte. The mechanism of electrical resistance transition and synaptic function can be attributed to the migration of the doped Ca²⁺ and the ionic functional groups of polyelectrolyte, which result in the formation and vanishing filament-like Ca²⁺ flux.