The transient enhanced diffusion (TED) of As in silicon samples implanted at 35 keV with dose ${\text{5×10}}^{15}\hspace{0.17em}{\mathrm{cm}}^{\text{−2}}$ has been investigated in the temperature range between 750 and 1030 °C by comparing experimental and simulated profiles. For temperatures higher than 900 °C the phenomenon is of modest entity and vanishes after a few seconds, whereas at lower temperatures diffusivity enhancements of some order of magnitude have been observed. The anomalous shift of the junction depth, evaluated at ${\text{2×10}}^{18}\hspace{0.17em}{\mathrm{cm}}^{\text{−3}},$ is about 12 nm at 900 °C and increases up to 45 nm at 750 °C. It has been verified that the two are the contributions, that generate the interstitial excess responsible for the TED: (i) the implantation damage and (ii) the aggregation in clusters of the As atoms. From an experiment that allows us to separate the two contributions, we estimate that about one third of the TED observed in the first 20 min of annealing at 800 °C is due to the defects produced by clustering. The influence of clustering on the shape of the As profiles after diffusion at different temperatures is also discussed.

The diffusion of indium in silicon has been investigated in the temperature range of 800 to 1000 °C by using secondary ion mass spectroscopy and transmission electron microscopy. Our data indicate that, for implants at 150 keV through a thin oxide layer (19 nm), the amount of dopant that leaves the silicon is only controlled by the flow of indium that reaches the surface, being both the segregation coefficient at the interface ${\mathrm{SiO}}_2/\mathrm{Si}$ and the indium diffusion coefficient in the oxide favorable to the out-diffusion. Comparison between experimental and simulated profiles has evidenced that, besides the expected transient enhanced diffusion occurring in the early phases of the annealing, a heavy loss of dopant by out-diffusion was associated with a high In diffusivity near the surface. Measurements of the hole concentration in uniformly doped silicon on insulator samples performed in the temperature range of 700 to 1100 °C indicate that indium solubility is equal or greater than ${\text{1.8×10}}^{18}\hspace{0.17em}{\mathrm{cm}}^{\text{−3}};$ this value is higher than those previously proposed in literature.

The continuous downscaling of the process size for semiconductor devices pushes the junction depths and consequentially the implantation depths to the top few nanometers of the Si substrate. This motivates the need for sensitive methods capable of analyzing dopant distribution, total dose and possible impurities. X-ray techniques utilizing the external reflection of X-rays are very surface sensitive, hence providing a non-destructive tool for process analysis and control.

Phosphorus implantation (30 keV, 3×1015 cm−2) into preamorphized Ge and subsequent rapid thermal or flash lamp annealing is investigated. During annealing a significant P diffusion in amorphous Ge is not observed. However, the fast solid phase epitaxial regrowth causes a rapid redistribution of P. After completion of the regrowth and at temperatures above 500 °C, a concentration-dependent diffusion of P in crystalline Ge takes place and leads to considerable loss of P toward the surface. An appreciable influence of implantation defects on the diffusion coefficient of P is not detected. For 60 s rapid thermal annealing at 600 °C and for 20 ms flash lamp annealing at 900 °C, the junction depth and the sheet resistance vary between 140 and 200 nm and between 50 and 100 Ω, respectively, and the maximum electrical activation of P is about 3–7×1019 cm−3.

The behavior during annealing of low-energy As-implanted Si have been investigated by comparing secondary ion mass spectrometry (SIMS) and simulated profiles. Z-contrast scanning transmission electron microscopy (STEM) imaging has also been used to determine the As local distribution in proximity of the sample surface. The implants have been performed with energies between 1 and $10\mathrm{keV}$ both through a thermally grown $11\mathrm{nm}$ thick oxide and without any oxide mask. SIMS and STEM profiles show, after short annealing at $800–1000°\mathrm{C}$ , an As pileup in the first nanometers of the Si matrix in proximity of the $\mathrm{Si}{\mathrm{O}}_2∕\mathrm{Si}$ interface. We demonstrate that this phenomenon can be explained with a “Fickian” standard diffusion by assuming the presence of unspecified “dopant traps” near the $\mathrm{Si}{\mathrm{O}}_2∕\mathrm{Si}$ interface that cause a drastic reduction of the dopant able to diffuse inside the bulk. We have also verified that removing before annealing the superficial $4\mathrm{nm}$ of Si does not eliminate the As pileup. Different mechanisms proposed in literature to explain the uphill diffusion are discussed. Furthermore, the availability of a suitable simulation model allows us to evaluate the dopant diffusivity during the annealing and investigate the transient enhanced diffusion (TED) phenomena.