Automated crack detection technologies based on deep learning have been extensively used as one of the indicators of performance degradation of concrete structures. However, there are numerous drawbacks of existing methods in crack segmentation due to the fine and microscopic properties of cracks. Aiming to address this issue, a crack segmentation method is proposed. First, a pyramidal residual network based on encoder–decoder using Omni-Dimensional Dynamic Convolution is suggested to explore the network suitable for the task of crack segmentation. Additionally, the proposed method uses the mean intersection over union as the network evaluation index to lessen the impact of background features on the network performance in the evaluation and adopts a multi-loss calculation of positive and negative sample imbalance to weigh the negative impact of sample imbalance. As a final step in performance evaluation, a dataset for concrete cracks is developed. By using our dataset, the proposed method is validated to have an accuracy of 99.05% and an mIoU of 87.00%. The experimental results demonstrate that the concrete crack segmentation method is superior to the well-known networks, such as SegNet, DeeplabV3+, and Swin-unet.

Deep learning (DL) is gradually becoming the most widely used computational approach in the field of mechanical fault diagnosis. However, the restricted hardware resources of mechanical vibration wireless sensor networks (WSNs) pose a challenge for DL deployment. In this article, we propose a convolutional neural networks (CNNs) hardware accelerator to address this challenge. First, a strategy of operator-sharing processing element (PE) arrays is employed to reduce the consumption of hardware logic resources. Various floating-point operation modes are achieved by configuring the input port data of the PE unit. Second, a memory mapping controller (MMC) is used to control the address mapping and data interactions between PE arrays, operators, and memories based on the index of the model. Finally, the accelerator employs a definable number of PE units and clock frequencies to make decisions based on available hardware logic resources. To the best of our knowledge, this is the first instance of deploying a hardware accelerator for CNNs on a mechanical vibration WSNs node. Meanwhile, we validate the CNN model using the gearbox dataset from the Driveline Diagnostic Simulator (DDS), and develop a WSNs node equipped with a Field Programmable Gate Array (FPGA) to validate the accelerator's performance. The experimental results demonstrate that, compared to the high-performance microcontroller at the same power consumption level, our deployment solution achieves a 10-fold improvement in inference speed while maintaining the accuracy of fault diagnosis.