This paper introduces an original hybrid unified power quality conditioner (HUPQC) topology as an alternative solution to electrical power quality problems. The proposed HUPQC consists of the shunt hybrid active power filter (SHAPF), the dynamic voltage restorer (DVR) and the isolated bi-directional DC-DC converter (BiDC) located at the common DC link. The SHAPF enables reduction in the voltage rating of the DC link capacitor, helps to reduce the cost and the size of the DC link and hence reduces switching losses of the voltage source inverter (VSI). Besides the novelty of its topology, dynamic reactive power compensation capability is realized for the first time in literature within HUPQC concept by achieving adaptively controlling DC link voltage. The BiDC not only provides isolation and bi-directional power flow between the DVR and the SHAPF but also operates to keep the DC link voltage of DVR constant against adaptively changing DC link voltage of the SHAPF. In addition to these, a new hybrid voltage sag/swell detection algorithm based on the combination of the improved clarke transformation and the enhanced phase-locked loop is developed and introduced. In order to verify the viability and effectiveness of the proposed HUPQC topology, experimental studies are carried out.

High power onboard battery chargers employed in electric vehicles (EVs) and plug-in hybrid EVs (PHEVs) fed from three-phase mains typically consist of a two-stage structure as AC-DC and DC-DC stages. The AC-DC stage is also known as the active front end (AFE). While the AFE rectifies the mains voltage, maintains the power factor, and provides a constant DC-link voltage to the DC-DC converter, the DC-DC converter stage regulates the charging current considering the charging algorithms in order to extend the battery service life. This study focuses on the selection of cost/performance effective AFE topology that can be used in high power onboard chargers. Four different suitable AC-DC topologies are investigated: (i) 3-phase 2-level rectifier, (ii) 3-phase, 3-level neutral-point-clamped (NPC) rectifier, (iii) 3-phase, 3-level T-type rectifier, and (iv) Vienna rectifier. In this study, the aforementioned AFE topologies have been simulated on the PLECS/SpeedFit environment and compared in terms of efficiency, losses, temperature, the number of switching elements, cost and cost/efficiency metrics. The performance results of the aforementioned topologies have been evaluated under different operating frequencies. The results reveal that the most suitable topology alternatives for the front-end AC-DC converter are 3-phase 2-level PWM rectifier and Vienna rectifier. Although the 3-phase 2-level PWM rectifier is superior with its 12% cost advantage, fewer components, and ease of control advantages, it lags a little behind the Vienna rectifier in terms of total harmonic distortion.

The interest in electric vehicle (EVs) components such as battery, battery chargers, and battery management systems is increasing in parallel with the spread of electric vehicles. One of the most critical of these components is battery chargers. Battery chargers are equipped with DC-DC converters with high efficiency, low cost, and wide output voltage range. In order to provide reliable operation of the battery charger, it is of great importance that the DC-DC converters are operated with a robust and stable controller as well as designed optimally. In this paper, a design method for a CLLC resonant converter-based bidirectional dc-dc converter (BiDC) is presented for a battery charger. The resonant converter, whose design details are presented, suggests a resonant system to be used in battery chargers with fewer components than the CLLLC converter, and similar voltage gain characteristics for bidirectional power flow operations compared to the LLC converter. The design procedure highlights performing the soft switching operation and determining the resonant tank parameters. In addition, the forward mode and reverse mode gain equations required for the system to operate in the desired output voltage range have been presented. The design procedures have been validated with a CLLC BiDC model with ratings of 1 kW, 400 V input / 300-450 V output in the PSIM environment. The performance results reveal that the zero voltage switching (ZVS) has been performed for primary-side MOSFETs under a wide load range.