The temperature-dependent characteristics of the latest generation 10 kV/20 A SiC MOSFET including the static characteristics and switching performance are carried out in this paper. The steady-state characteristics, including saturation current, output characteristics, anti-parallel diode and parasitic capacitance, are tested. A double pulse test platform is constructed including a circuit breaker and gate drive of the 10 kV MOSFET with >10 kV insulation and also a hot plate under the device under test for temperature-dependent characterization during switching transients. The switching performance is tested under various load currents and gate resistances at a 7 kV dc-link voltage from 25 °C to 125 °C. A simple behavioral model with its parameter extraction method is proposed to predict the temperature-dependent characteristics of the 10 kV MOSFET. The switching speed limitations, including the reverse recovery of SiC MOSFET's body diode, over-voltage caused by stray inductance, cross-talk, heat sink and electromagnetic interference (EMI) to the control are discussed based on simulations and experimental results.

This paper presents the characterization of the temperature-dependent short circuit performance of a Gen3 10 kV/20 A silicon carbide (SiC) MOSFET. The test platform consisting of a phase-leg configuration and a fast speed 10 kV solid state circuit breaker (SSCB), with temperature control, is introduced in detail. A novel FPGA-based short circuit protection circuit having a response time of 1.5 μs is proposed and integrated into the gate driver. The short circuit protection is validated through the platform. The short circuit characteristics for both the hard switching fault (HSF) and fault under load (FUL) types at various dc-link voltages (from 500 V to 6 kV) are tested and discussed. The saturation current increases with dc-link voltage and achieves 360 A at 6 kV. Different from low voltage SiC devices, there is no current spike in FUL type of fault. The temperature-dependent short circuit performance is also presented from 25 °C to 125 °C. The difference of short circuit waveforms at various initial junction temperatures can be neglected. A thermal model of the 10 kV SiC MOSFET is built for the junction temperature estimation during the short circuit and for analysis of the initial junction temperature impact on the short circuit performance.

High-performance gate drive power supply (GDPS) plays a crucial role in ensuring the reliability and safety of the gate driver for power semiconductor devices. This article focuses on the design of a high-voltage-insulated GDPS for the 10-kV silicon carbide MOSFET in medium-voltage (MV) application. Design considerations, including insulation scheme, high-voltage-insulated transformer design, and load voltage regulation scheme, are proposed. In addition, the performance of the secondary-side-regulated (SSR) GDPS and that of the primary-side-regulated (PSR) GDPS are compared for several aspects, including interwinding capacitance, load voltage regulation rate, conversion efficiency, and hardware complexity. Finally, an SSR GDPS and a PSR GDPS, with an insulation voltage of 20 kV, are built in the lab. The test results demonstrate that the PSR GDPS is more preferable because of lower interwinding capacitance, lower load voltage regulation rate, higher conversion efficiency, and simpler control circuit.

The series connection of insulated gate bipolar transistors (IGBTs) allows operation at voltage levels higher than the rated voltage of one IGBT and has less power semiconductor costs compared to multi-level topologies. However, voltage unbalance during the switching transient is a challenge for series-connected device application. This paper presents an FPGA-based voltage balancing strategy for multi series connected HV-IGBTs including a FPGA-based active voltage balancing control (AVBC) circuit integrated in the gate driver and the control for multi series connected IGBTs. The effectiveness of the control has been experimentally validated in a prototype using four 4.5 kV HV-IGBTs in series connection.

Modular multi active bridge (MMAB) converter can provide multiple dc ports using modular H-bridge. When voltage conversion ratios of each port are not equally balanced, zero-voltage-switching (ZVS) turn- on of power semiconductors in the MMAB converter cannot be secured under single phase shift (SPS) control, increasing power loss and leading to lower efficiency. To estimate the efficiency of the converter in various conditions, ZVS operation region of MMAB converters under SPS is comprehensively derived based on steady-state time domain with superposition theorem. Voltage conversion ratios are taken as main variables for ZVS region analysis and influences of them are comprehensively analyzed. Full ZVS regions and constrained ZVS regions are obtained by ZVS discriminants. Simulation and experimental results for a three-port MMAB prototype are given to verify the theoretical analysis of ZVS operation region.

Using high voltage (HV) Silicon Carbide (SiC) power semiconductors in the modular multilevel converter (MMC) is promising because of a fewer submodules and lower switching loss compared to conventional Si based solutions. The nearest level pulse width modulation (NL-PWM) is commonly used in the MMC for medium voltage applications. However, with the NL-PWM and existing voltage balancing control, there are many submodules that switch their modes in a control cycle, resulting in a high dv/dt during the deadtime of the power semiconductor, which could be multiple times of the dv/dt of single device. This poses great challenges on the noise immunity and insulation design in the MMC using HV SiC devices, which have very fast switching speed. A novel voltage balancing control, which ensures only two submodules switch their modes in a control cycle, is proposed in this paper, limiting the maximum dv/dt to the dv/dt of single power semiconductor and meanwhile maintaining the voltage balance performance. The proposed voltage balancing control is experimentally validated in a 10 kV SiC MOSFET based MMC with four submodules per arm.