The aim of this letter is to improve the performance of clock synchronization in EtherCAT networks. Although EtherCAT synchronizes the slave clocks to the reference clock using a distributed clock synchronization mechanism, a synchronization error still exists between them. We propose a method to estimate and significantly reduce this error. In addition, we implement the method within the existing synchronization mechanism without adding an excessive computational load. The experimental results for synchronization performance verify that the proposed method improves the accuracy of clock synchronization in EtherCAT networks.

In the study, we develop a method to improve the accuracy of master–slave synchronization in EtherCAT networks. The method involves two key compensations that are not considered in the EtherCAT protocol. First, the propagation delay between the master and reference slave is measured, and the system time of the reference slave is then compensated for the measured propagation delay. Second, the bias component of the synchronization error between the master and reference slave is periodically estimated, and system time of each slave is then compensated for the estimated bias component. The entire method is implemented as part of the master application without modifying the EtherCAT protocol or requiring excessive computation load or large memory space. Thus, the developed method is advantageous because it can be immediately applied at low cost to existing EtherCAT networks. By performing extensive experiments based on a Linux-based EtherCAT master, we demonstrate that the developed method significantly improves the accuracy of the master–slave synchronization in EtherCAT networks.

We employ an external processor to distribute the master computing load in the EtherCAT networked control system and develop a method for time synchronization between the Linux on the external processor and EtherCAT network. The synchronization between the Linux on the external processor and EtherCAT master is performed by using general-purpose input/output and shared memory, and the synchronization accuracy is significantly improved by compensating for the system time setting latency and general-purpose input detection latency in the EtherCAT master. The developed method is implemented as part of the master application without modifying the EtherCAT protocol or requiring an excessive computational load. By performing extensive experiments and analyzing the results, we demonstrate that the developed method achieves the synchronization error means less than 1 μs with standard deviations less than 5 μs between the external processor and EtherCAT network. This synchronization accuracy can be acceptable for various networked control applications based on Linux.

The authors propose a parameter identification method for sequential identification of electrical and mechanical parameters of surface‐mounted permanent magnet synchronous motors (SPMSMs). Two normalised least mean square (NLMS) adaptive filters (AFs) are designed for identifying the electrical parameters, where the first AF identifies the stator inductance and the second AF identifies the stator resistance and rotor flux linkage. The NLMS AFs achieve faster transient responses than recursive least squares (RLS) AFs owing to lower computing load and smaller memory size. Regarding mechanical parameters, an extended sliding‐mode mechanical parameter observer (ESMMPO) is employed to estimate the system disturbance and angular velocity, from which the rotational inertia, viscous damping coefficient, and load torque are identified. The rotor flux linkage identified from the second NLMS AF is used for estimating the real‐time system disturbance of the ESMMPO, which enables the identification of mechanical parameters with higher accuracy. The proposed method effectively integrates the NLMS AFs and ESMMPO into a single framework to identify both electrical and mechanical parameters of the SPMSMs. The experimental results of the proposed method are compared with those of RLS AFs and the conventional ESMMPO, which demonstrates the faster response and less steady‐state parameter errors of the proposed method.

In this study, we design a state predictor-based output feedback controller that compensates for unavoidable time-varying network delays in networked control systems (NCSs) over Wi-Fi networks. We model time-varying network delays as timevarying input delays of NCSs over Wi-Fi networks. The designed controller consists of a linear quadratic regulator (LQR), a full-order observer, and a time-varying stepahead state predictor. The state predictor plays a key role in compensating for the time-varying input delay by providing the LQR with an estimation of future states ahead by the current network delay time. The time-varying network delays are acquired in real time by measuring the time differences between sent and received control data packets. We verify the stability and compensation performance of the designed controller by performing extensive experiments for an NCS in which a rotary inverted pendulum is controlled over Wi-Fi networks.