To resolve the problems associated with the small target presented by printed circuit board surface defects and the low detection accuracy of these defects, the printed circuit board surface-defect detection network DCR-YOLO is designed to meet the premise of real-time detection speed and effectively improve the detection accuracy. Firstly, the backbone feature extraction network DCR-backbone, which consists of two CR residual blocks and one common residual block, is used for small-target defect extraction on printed circuit boards. Secondly, the SDDT-FPN feature fusion module is responsible for the fusion of high-level features to low-level features while enhancing feature fusion for the feature fusion layer, where the small-target prediction head YOLO Head-P3 is located, to further enhance the low-level feature representation. The PCR module enhances the feature fusion mechanism between the backbone feature extraction network and the SDDT-FPN feature fusion module at different scales of feature layers. The C₅ECA module is responsible for adaptive adjustment of feature weights and adaptive attention to the requirements of small-target defect information, further enhancing the adaptive feature extraction capability of the feature fusion module. Finally, three YOLO-Heads are responsible for predicting small-target defects for different scales. Experiments show that the DCR-YOLO network model detection map reaches 98.58%; the model size is 7.73 MB, which meets the lightweight requirement; and the detection speed reaches 103.15 fps, which meets the application requirements for real-time detection of small-target defects.

For the problem of small target of printed circuit board surface defects and low detection accuracy, the printed circuit board surface defect detection network DCR-YOLO is designed to meet the premise of real-time detection speed and effectively improve the detection accuracy. Firstly, the backbone feature extraction network DCR-backbone, consisting of two CR residual blocks and one common residual block, is used for small target defect extraction on printed circuit boards. Secondly, the SDDT-FPN feature fusion module is responsible for the fusion of high level features to low level features, while enhancing feature fusion for the feature fusion layer where the small target prediction head YOLO Head-P3 is located to further enhance the low level feature representation. the PCR module enhances the feature fusion mechanism between the backbone feature extraction network and the SDDT-FPN feature fusion module at different scales of feature layers. the C5ECA module is responsible for adaptive adjustment of feature weights and adaptive attention to the requirements of small target defect information, further enhancing the adaptive feature extraction capability of the feature fusion module. Finally, three YOLO-Heads are responsible for predicting small target defects for different scales. Experiments show that the DCR-YOLO network model detection Map reaches 98.58%, the model size is 7.73MB, which meets the lightweight requirement, and the detection speed reaches 103.15fps, which meets the application requirements for real-time detection of small target defects.